Patents by Inventor Yoshinori Tokioka
Yoshinori Tokioka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10331204Abstract: A semiconductor device which makes it possible to reduce a wasteful standby time at power-on is provided. In this semiconductor device, a reset of an internal circuit is canceled as described below. When a data signal stored in a storage section is at “0,” the reset is canceled by bringing an internal reset signal to the “H” level when a relatively short time has passed after the rising edge of a power on reset signal. When the data signal is at “1,” the reset is canceled by bringing the internal reset signal to the “H” level when a relatively long time has passed after the rising edge of the power on reset signal. Therefore, a wasteful standby time at power-on can be reduced by writing the data signal logically equivalent to the rise time of supply voltage to the storage section.Type: GrantFiled: March 8, 2018Date of Patent: June 25, 2019Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yoshinori Tokioka, Soichi Kobayashi, Akira Oizumi
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Patent number: 10110060Abstract: The disclosed invention is intended to prevent malfunction of an internal circuit because of unwanted power supply switching caused by a noise during operation of a semiconductor device powered by a backup power supply, while eliminating wasteful consumption of the backup power supply. A first switching transition time after coupling the main power supply terminal to the internal power supply node until decoupling the backup power supply terminal from the internal power supply node is made longer than a second switching transition time after coupling the backup power supply terminal to the internal power supply node until decoupling the main power supply terminal from the internal power supply node.Type: GrantFiled: September 12, 2017Date of Patent: October 23, 2018Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Tomoki Yasukawa, Akira Oizumi, Toyohiko Yoshida, Yoshinori Tokioka
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Publication number: 20180196500Abstract: A semiconductor device which makes it possible to reduce a wasteful standby time at power-on is provided. In this semiconductor device, a reset of an internal circuit is canceled as described below. When a data signal stored in a storage section is at “0,” the reset is canceled by bringing an internal reset signal to the “H” level when a relatively short time has passed after the rising edge of a power on reset signal. When the data signal is at “1,” the reset is canceled by bringing the internal reset signal to the “H” level when a relatively long time has passed after the rising edge of the power on reset signal. Therefore, a wasteful standby time at power-on can be reduced by writing the data signal logically equivalent to the rise time of supply voltage to the storage section.Type: ApplicationFiled: March 8, 2018Publication date: July 12, 2018Inventors: Yoshinori TOKIOKA, Soichi KOBAYASHI, Akira OIZUMI
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Patent number: 9946332Abstract: A semiconductor device which makes it possible to reduce a wasteful standby time at power-on is provided. In this semiconductor device, a reset of an internal circuit is canceled as described below. When a data signal stored in a storage section is at “0,” the reset is canceled by bringing an internal reset signal to the “H” level when a relatively short time has passed after the rising edge of a power on reset signal. When the data signal is at “1,” the reset is canceled by bringing the internal reset signal to the “H” level when a relatively long time has passed after the rising edge of the power on reset signal. Therefore, a wasteful standby time at power-on can be reduced by writing the data signal logically equivalent to the rise time of supply voltage to the storage section.Type: GrantFiled: February 22, 2017Date of Patent: April 17, 2018Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yoshinori Tokioka, Soichi Kobayashi, Akira Oizumi
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Publication number: 20180006491Abstract: The disclosed invention is intended to prevent malfunction of an internal circuit because of unwanted power supply switching caused by a noise during operation of a semiconductor device powered by a backup power supply, while eliminating wasteful consumption of the backup power supply. A first switching transition time after coupling the main power supply terminal to the internal power supply node until decoupling the backup power supply terminal from the internal power supply node is made longer than a second switching transition time after coupling the backup power supply terminal to the internal power supply node until decoupling the main power supply terminal from the internal power supply node.Type: ApplicationFiled: September 12, 2017Publication date: January 4, 2018Inventors: Tomoki YASUKAWA, Akira OIZUMI, Toyohiko YOSHIDA, Yoshinori TOKIOKA
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Patent number: 9787135Abstract: The disclosed invention is intended to prevent malfunction of an internal circuit because of unwanted power supply switching caused by a noise during operation of a semiconductor device powered by a backup power supply, while eliminating wasteful consumption of the backup power supply. A first switching transition time after coupling the main power supply terminal to the internal power supply node until decoupling the backup power supply terminal from the internal power supply node is made longer than a second switching transition time after coupling the backup power supply terminal to the internal power supply node until decoupling the main power supply terminal from the internal power supply node.Type: GrantFiled: September 2, 2015Date of Patent: October 10, 2017Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Tomoki Yasukawa, Akira Oizumi, Toyohiko Yoshida, Yoshinori Tokioka
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Publication number: 20170160792Abstract: A semiconductor device which makes it possible to reduce a wasteful standby time at power-on is provided. In this semiconductor device, a reset of an internal circuit is canceled as described below. When a data signal stored in a storage section is at “0,” the reset is canceled by bringing an internal reset signal to the “H” level when a relatively short time has passed after the rising edge of a power on reset signal. When the data signal is at “1,” the reset is canceled by bringing the internal reset signal to the “H” level when a relatively long time has passed after the rising edge of the power on reset signal. Therefore, a wasteful standby time at power-on can be reduced by writing the data signal logically equivalent to the rise time of supply voltage to the storage section.Type: ApplicationFiled: February 22, 2017Publication date: June 8, 2017Inventors: Yoshinori TOKIOKA, Soichi KOBAYASHI, Akira OIZUMI
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Patent number: 9612644Abstract: A semiconductor device which makes it possible to reduce a wasteful standby time at power-on is provided. In this semiconductor device, a reset of an internal circuit is canceled as described below. When a data signal stored in a storage section is at “0,” the reset is canceled by bringing an internal reset signal to the “H” level when a relatively short time has passed after the rising edge of a power on reset signal. When the data signal is at “1,” the reset is canceled by bringing the internal reset signal to the “H” level when a relatively long time has passed after the rising edge of the power on reset signal. Therefore, a wasteful standby time at power-on can be reduced by writing the data signal logically equivalent to the rise time of supply voltage to the storage section.Type: GrantFiled: September 3, 2015Date of Patent: April 4, 2017Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yoshinori Tokioka, Soichi Kobayashi, Akira Oizumi
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Publication number: 20160065001Abstract: The disclosed invention is intended to prevent malfunction of an internal circuit because of unwanted power supply switching caused by a noise during operation of a semiconductor device powered by a backup power supply, while eliminating wasteful consumption of the backup power supply. A first switching transition time after coupling the main power supply terminal to the internal power supply node until decoupling the backup power supply terminal from the internal power supply node is made longer than a second switching transition time after coupling the backup power supply terminal to the internal power supply node until decoupling the main power supply terminal from the internal power supply node.Type: ApplicationFiled: September 2, 2015Publication date: March 3, 2016Inventors: Tomoki YASUKAWA, Akira OIZUMI, Toyohiko YOSHIDA, Yoshinori TOKIOKA
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Patent number: 9236858Abstract: To provide a semiconductor device provided with a power-on reset circuit that can reliably detect decrease in power-supply voltage. The power-on reset circuit provided on the semiconductor device includes: a first comparison circuit that compares a primary voltage with a reference value; and a second comparison circuit that compares a secondary voltage with the reference value. The power-on reset circuit issues a reset signal based on comparison results of the first and second comparison circuits.Type: GrantFiled: December 15, 2014Date of Patent: January 12, 2016Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Shigeki Nakamura, Shintaro Mori, Yoshinori Tokioka, Kenji Tokami
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Publication number: 20150378426Abstract: A semiconductor device which makes it possible to reduce a wasteful standby time at power-on is provided. In this semiconductor device, a reset of an internal circuit is canceled as described below. When a data signal stored in a storage section is at “0,” the reset is canceled by bringing an internal reset signal to the “H” level when a relatively short time has passed after the rising edge of a power on reset signal. When the data signal is at “1,” the reset is canceled by bringing the internal reset signal to the “H” level when a relatively long time has passed after the rising edge of the power on reset signal. Therefore, a wasteful standby time at power-on can be reduced by writing the data signal logically equivalent to the rise time of supply voltage to the storage section.Type: ApplicationFiled: September 3, 2015Publication date: December 31, 2015Inventors: Yoshinori TOKIOKA, Soichi KOBAYASHI, Akira OIZUMI
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Patent number: 9166601Abstract: A semiconductor device which makes it possible to reduce a wasteful standby time at power-on is provided. In this semiconductor device, a reset of an internal circuit is canceled as described below. When a data signal stored in a storage section is at “0,” the reset is canceled by bringing an internal reset signal to the “H” level when a relatively short time has passed after the rising edge of a power on reset signal. When the data signal is at “1,” the reset is canceled by bringing the internal reset signal to the “H” level when a relatively long time has passed after the rising edge of the power on reset signal. Therefore, a wasteful standby time at power-on can be reduced by writing the data signal logically equivalent to the rise time of supply voltage to the storage section.Type: GrantFiled: September 25, 2013Date of Patent: October 20, 2015Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yoshinori Tokioka, Soichi Kobayashi, Akira Oizumi
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Patent number: 9130574Abstract: A semiconductor device which makes it possible to reduce a wasteful standby time at power-on is provided. In this semiconductor device, a reset of an internal circuit is canceled as described below. When a data signal stored in a storage section is at “0,” the reset is canceled by bringing an internal reset signal to the “H” level when a relatively short time has passed after the rising edge of a power on reset signal. When the data signal is at “1,” the reset is canceled by bringing the internal reset signal to the “H” level when a relatively long time has passed after the rising edge of the power on reset signal. Therefore, a wasteful standby time at power-on can be reduced by writing the data signal logically equivalent to the rise time of supply voltage to the storage section.Type: GrantFiled: September 25, 2013Date of Patent: September 8, 2015Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Yoshinori Tokioka, Soichi Kobayashi, Akira Oizumi
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Publication number: 20150188436Abstract: The present invention is directed to prevent occurrence of a problem on a withstand voltage in a circuit group which receives supply of an internal power supply voltage. An error amplifier outputs a control voltage obtained by amplifying a difference voltage between a reference voltage and a divided voltage obtained by dividing an internal power supply voltage to an output node. A drive transistor supplies a drive current according to the control voltage of the output node of the error amplifier from an external power supply line to an internal power supply line. When the divided voltage exceeds a predetermined voltage, a clamp circuit changes the control voltage in the direction of decreasing the drive current.Type: ApplicationFiled: March 13, 2015Publication date: July 2, 2015Inventors: Yoshinori Tokioka, Kenji Tokami, Shintaro Mori, Shigeki Nakamura
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Publication number: 20150155854Abstract: There is a need to provide a technology that shortens a time period from a point to start an external power supply for a microcontroller to a point to start operating a logic circuit. A stable voltage supply circuit of a semiconductor circuit accepts an external power supply VCC and supplies a VDD line with one of a power supply voltage to cause a stable output voltage and a power supply voltage to cause an unstable output voltage and fast start. At startup, the semiconductor circuit accepts an external power supply. The semiconductor circuit raises a power supply voltage to cause a stable output voltage and supplies a logic portion initialization circuit with an unstable power supply voltage to fast start, and initializes a VDD operation circuit. When the output voltage is stabilized, the semiconductor circuit changes a power supply voltage supplied to the VDD line and starts operating the VDD operation circuit.Type: ApplicationFiled: November 19, 2014Publication date: June 4, 2015Inventors: Keiichi HAYASAKA, Toyohiko YOSHIDA, Akira OIZUMI, Yoshinori TOKIOKA
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Publication number: 20150097601Abstract: To provide a semiconductor device provided with a power-on reset circuit that can reliably detect decrease in power-supply voltage. The power-on reset circuit provided on the semiconductor device includes: a first comparison circuit that compares a primary voltage with a reference value; and a second comparison circuit that compares a secondary voltage with the reference value. The power-on reset circuit issues a reset signal based on comparison results of the first and second comparison circuits.Type: ApplicationFiled: December 15, 2014Publication date: April 9, 2015Inventors: Shigeki NAKAMURA, Shintaro MORI, Yoshinori TOKIOKA, Kenji TOKAMI
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Patent number: 8994410Abstract: The present invention is directed to prevent occurrence of a problem on a withstand voltage in a circuit group which receives supply of an internal power supply voltage. An error amplifier outputs a control voltage obtained by amplifying a difference voltage between a reference voltage and a divided voltage obtained by dividing an internal power supply voltage to an output node. A drive transistor supplies a drive current according to the control voltage of the output node of the error amplifier from an external power supply line to an internal power supply line. When the divided voltage exceeds a predetermined voltage, a clamp circuit changes the control voltage in the direction of decreasing the drive current.Type: GrantFiled: September 25, 2013Date of Patent: March 31, 2015Assignee: Renesas Electronics CorporationInventors: Yoshinori Tokioka, Kenji Tokami, Shintaro Mori, Shigeki Nakamura
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Patent number: 8941421Abstract: To provide a semiconductor device provided with a power-on reset circuit that can reliably detect decrease in power-supply voltage. The power-on reset circuit provided on the semiconductor device includes: a first comparison circuit that compares a primary voltage with a reference value; and a second comparison circuit that compares a secondary voltage with the reference value. The power-on reset circuit issues a reset signal based on comparison results of the first and second comparison circuits.Type: GrantFiled: September 25, 2013Date of Patent: January 27, 2015Assignee: Renesas Electronics CorporationInventors: Shigeki Nakamura, Shintaro Mori, Yoshinori Tokioka, Kenji Tokami
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Publication number: 20140084973Abstract: A semiconductor device which makes it possible to reduce a wasteful standby time at power-on is provided. In this semiconductor device, a reset of an internal circuit is canceled as described below. When a data signal stored in a storage section is at “0,” the reset is canceled by bringing an internal reset signal to the “H” level when a relatively short time has passed after the rising edge of a power on reset signal. When the data signal is at “1,” the reset is canceled by bringing the internal reset signal to the “H” level when a relatively long time has passed after the rising edge of the power on reset signal. Therefore, a wasteful standby time at power-on can be reduced by writing the data signal logically equivalent to the rise time of supply voltage to the storage section.Type: ApplicationFiled: September 25, 2013Publication date: March 27, 2014Applicant: RENESAS ELECTRONICS CORPORATIONInventors: Yoshinori Tokioka, Soichi Kobayashi, Akira Oizumi
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Publication number: 20140084983Abstract: The present invention is directed to prevent occurrence of a problem on a withstand voltage in a circuit group which receives supply of an internal power supply voltage. An error amplifier outputs a control voltage obtained by amplifying a difference voltage between a reference voltage and a divided voltage obtained by dividing an internal power supply voltage to an output node. A drive transistor supplies a drive current according to the control voltage of the output node of the error amplifier from an external power supply line to an internal power supply line. When the divided voltage exceeds a predetermined voltage, a clamp circuit changes the control voltage in the direction of decreasing the drive current.Type: ApplicationFiled: September 25, 2013Publication date: March 27, 2014Applicant: Renesas Electronics CorporationInventors: Yoshinori Tokioka, Kenji Tokami, Shintaro Mori, Shigeki Nakamura