Patents by Inventor Yoshio Maehana

Yoshio Maehana has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8807522
    Abstract: A variable impedance circuit is provided as an active load between an input line L1 and an output line L2. This circuit has low impedance with respect to a DC electric current signal and has high impedance with respect to an AC electric current signal, structured from a series circuit of resistors R1, R2, and R3 connected between lines L1 and L2; a transistor Q1 having the collector connected to the line L1 and the base connected between the resistors R2 and R3; a resistor R4 connected between the emitter of the transistor Q1 and the line L2; a capacitor C1 with one end connected between the resistors R2 and R3; a resistor R5 connected between the other end of the capacitor C1 and the line L2; a capacitor C2 having one end connected between the resistors R1 and R2; and a resistor R6 connected between the other end of the capacitor C2 and the line L2.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: August 19, 2014
    Assignee: Azbil Corporation
    Inventors: Kouji Okuda, Hiroaki Nagoya, Yoshio Maehana