Patents by Inventor Yoshio Mezaki

Yoshio Mezaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8381493
    Abstract: Affords a compound semiconductor substrate packaging method for preventing oxidation of the surface of compound semiconductor substrates.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: February 26, 2013
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takayuki Nishiura, Yoshio Mezaki, Yoshiki Yabuhara
  • Patent number: 8133815
    Abstract: Compound-semiconductor-substrate polishing methods, compound semiconductor substrates, compound-semiconductor-epitaxial-substrate manufacturing methods, and compound semiconductor epitaxial substrates whereby oxygen superficially present on the substrates reduced. A compound semiconductor-substrate polishing method includes a preparation step (S10), a first polishing step (S20), and a second polishing step (S30). In the preparation step (S10), a compound semiconductor substrate is prepared. In the first polishing step (S20), the compound semiconductor substrate is polished with a chloric polishing agent. In the second polishing step (S30), subsequent to the first polishing step (S20), a polishing operation utilizing an alkaline aqueous solution containing an inorganic builder and having pH of 8.5 to 13.0 inclusive is performed.
    Type: Grant
    Filed: September 28, 2007
    Date of Patent: March 13, 2012
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Yoshio Mezaki, Takayuki Nishiura, Masahiro Nakayama
  • Patent number: 7713844
    Abstract: A method for working a nitride semiconductor substrate, comprising the steps of: preparing a disk-shaped nitride semiconductor substrate comprising a plurality of striped regions having defect concentration regions in which crystal defect density is higher than in surrounding low defect regions; and forming a cut-out at a specific location along the edge of the nitride semiconductor substrate, using as a reference the direction in which at least one from among the plurality of striped regions extends.
    Type: Grant
    Filed: September 7, 2006
    Date of Patent: May 11, 2010
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takayuki Nishiura, Yoshio Mezaki
  • Patent number: 7619301
    Abstract: A GaAs semiconductor substrate includes a surface layer. When an atomic ratio is to be calculated using a 3d electron spectrum of Ga atoms and As atoms measured at the condition of 10° for the photoelectron take-off angle ? by X-ray photoelectron spectroscopy, the structural atomic ratio of all Ga atoms to all As atoms (Ga)/(As) at the surface layer is at least 0.5 and not more than 0.9, the ratio of As atoms bound with O atoms to all Ga atoms and all As atoms (As—O)/{(Ga)+(As)} at the surface layer is at least 0.15 and not more than 0.35, and the ratio of Ga atoms bound with O atoms to all Ga atoms and all As atoms (Ga—O)/{(Ga)+(As)} at the surface layer is at least 0.15 and not more than 0.35. Accordingly, there is provided a GaAs semiconductor substrate having a surface cleaned to an extent allowing removal of impurities and oxides at the surface by at least thermal cleaning of the substrate.
    Type: Grant
    Filed: October 9, 2007
    Date of Patent: November 17, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takayuki Nishiura, Yoshio Mezaki, Yusuke Horie, Yasuaki Higuchi
  • Publication number: 20090249747
    Abstract: Affords a compound semiconductor substrate packaging method for preventing oxidation of the surface of compound semiconductor substrates.
    Type: Application
    Filed: March 27, 2009
    Publication date: October 8, 2009
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Takayuki Nishiura, Yoshio Mezaki, Yoshiki Yabuhara
  • Publication number: 20080299350
    Abstract: Compound-semiconductor-substrate polishing methods, compound semiconductor substrates, compound-semiconductor-epitaxial-substrate manufacturing methods, and compound semiconductor epitaxial substrates whereby oxygen superficially present on the substrates reduced. A compound semiconductor-substrate polishing method includes a preparation step (S10), a first polishing step (S20), and a second polishing step (S30). In the preparation step (S10), a compound semiconductor substrate is prepared. In the first polishing step (S20), the compound semiconductor substrate is polished with a chloric polishing agent. In the second polishing step (S30), subsequent to the first polishing step (S20), a polishing operation utilizing an alkaline aqueous solution containing an inorganic builder and having pH of 8.5 to 13.0 inclusive is performed.
    Type: Application
    Filed: September 28, 2007
    Publication date: December 4, 2008
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yoshio Mezaki, Takayuki Nishiura, Masahiro Nakayama
  • Publication number: 20080296738
    Abstract: A GaAs semiconductor substrate includes a surface layer. When an atomic ratio is to be calculated using a 3d electron spectrum of Ga atoms and As atoms measured at the condition of 10° for the photoelectron take-off angle ? by X-ray photoelectron spectroscopy, the structural atomic ratio of all Ga atoms to all As atoms (Ga)/(As) at the surface layer is at least 0.5 and not more than 0.9, the ratio of As atoms bound with O atoms to all Ga atoms and all As atoms (As—O)/{(Ga)+(As)} at the surface layer is at least 0.15 and not more than 0.35, and the ratio of Ga atoms bound with O atoms to all Ga atoms and all As atoms (Ga—O)/{(Ga)+(As)} at the surface layer is at least 0.15 and not more than 0.35. Accordingly, there is provided a GaAs semiconductor substrate having a surface cleaned to an extent allowing removal of impurities and oxides at the surface by at least thermal cleaning of the substrate.
    Type: Application
    Filed: October 9, 2007
    Publication date: December 4, 2008
    Inventors: Takayuki Nishiura, Yoshio Mezaki, Yusuke Horie, Yasuaki Higuchi
  • Publication number: 20070080366
    Abstract: A method for working a nitride semiconductor substrate, comprising the steps of: preparing a disk-shaped nitride semiconductor substrate comprising a plurality of striped regions having defect concentration regions in which crystal defect density is higher than in surrounding low defect regions; and forming a cut-out at a specific location along the edge of the nitride semiconductor substrate, using as a reference the direction in which at least one from among the plurality of striped regions extends.
    Type: Application
    Filed: September 7, 2006
    Publication date: April 12, 2007
    Inventors: Takayuki Nishiura, Yoshio Mezaki
  • Patent number: 7078343
    Abstract: Compound-semiconductor-wafer manufacturing whereby particle adherence, and obverse-surface oxidization and alteration are slight and the use of organic solvents is reduced. An adsorption pad is bonded to a polishing plate, and a wafer being adsorbed onto the adsorption pad without using wax is polished and thereafter stored within purified water without drying. Since storage is within purified water, particle adherence, and obverse-surface oxidization and alteration turn out to be slight, yielding a high-quality wafer. In the cleaning procedure following the aquatic storage, organic solvent washing is omitted. This allows the use/waste volume of noxious organic solvent to be reduced.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: July 18, 2006
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Takatoshi Okamoto, Yoshio Mezaki, Toshiyuki Morimoto
  • Publication number: 20030104696
    Abstract: Compound-semiconductor-wafer manufacturing whereby particle adherence, and obverse-surface oxidization and alteration are slight and the use of organic solvents is reduced. An adsorption pad is bonded to a polishing plate, and a wafer being adsorbed onto the adsorption pad without using wax is polished and thereafter stored within purified water without drying. Since storage is within purified water, particle adherence, and obverse-surface oxidization and alteration turn out to be slight, yielding a high-quality wafer. In the cleaning procedure following the aquatic storage, organic solvent washing is omitted. This allows the use/waste volume of noxious organic solvent to be reduced.
    Type: Application
    Filed: October 19, 2002
    Publication date: June 5, 2003
    Inventors: Takatoshi Okamoto, Yoshio Mezaki, Toshiyuki Morimoto