Abstract: A CPU includes a bus interface, a control unit, an instruction cache, a data cache, a secondary cache, an instruction decoder, an arithmetic unit, and registers. When operations can be performed only with the cache, the CPU inhibits access to external memory and stops power supply to the external memory. With this arrangement, by performing operations in the CPU without using the external memory, it is possible to realize a speedy processing and to stop power supply to the external memory, thus allowing for reduction in power consumption.

Abstract: A image data storage device includes an image data input unit, an image data recording unit, a compression processing unit, a region decision unit, and a compression control unit. The image data input unit receives input of image data. The image data recording unit records image data inputted by the image input unit. The compression processing unit compresses image data to be recorded in the image data recording unit. The region decision unit decides whether or not image data which has been inputted by the image input unit is image data related to an edge portion region of an image. And the compression control unit controls the compression processing unit so that compression processing is canceled for image data which has been decided, by the region decision unit, to be image data related to an edge portion region of an image.

Abstract: Corrected values C1, M1, and Y1 corrected in a quasi-grayscale processing section of an image forming device by an error diffusion technique performed for each channel are evaluated in threshold value sections provided for individual channels, so as to determine whether or not they are greater than threshold values. If an overlapping CMY dot formation detector section detects that the density is higher than the threshold value in all of the three channels, a minimum density channel identifying section instructs a first quantized value substitution section and varies the outputs from the threshold value sections, so that the output in the channel with the lowest density has a value that does not represent dot formation. As a result, overlapping dot formation for the three channels is interrupted.

Abstract: A CPU includes a bus interface, a control unit, an instruction cache, a data cache, a secondary cache, an instruction decoder, an arithmetic unit, and registers. When operations can be performed only with the cache, the CPU inhibits access to external memory and stops power supply to the external memory. With this arrangement, by performing operations in the CPU without using the external memory, it is possible to realize a speedy processing and to stop power supply to the external memory, thus allowing for reduction in power consumption.

Abstract: An image forming apparatus which can detect a defect in a nozzle and an optical system, and inform an execution of maintenance. The apparatus comprises a scanner which reads an image; a print head which prints an image; a test pattern image data ROM stored a test pattern; and an image processing unit which diagnoses a defect in the print head and the scanner by processing data of the test pattern which is read by the scanner.