Patents by Inventor Yoshio Shimoaka

Yoshio Shimoaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8330271
    Abstract: A semiconductor element that is excellent in both mechanical reliability and electrical reliability and a mounting structure for the semiconductor element are provided. The semiconductor element includes: a substrate; an electrically conductive layer on the substrate; a protective layer having an opening on the electrically conductive layer; a barrier metal layer in contact with the electrically conductive layer in the opening; and an electrically conductive bump on the barrier metal layer. The barrier metal layer contains phosphorus and has a phosphorus-rich portion that has a higher phosphorus content than the remaining portion has. The phosphorus-rich portion is located in the surface of the barrier metal layer facing the electrically conductive bump, and the thickness thereof in the periphery of the region where the electrically conductive bump is formed is larger than at the center of the region.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: December 11, 2012
    Assignee: Kyocera Corporation
    Inventors: Kenichi Kato, Yoshio Shimoaka
  • Patent number: 8044511
    Abstract: The semiconductor device is manufactured by forming a lower electrode layer 2 having a predetermined pattern on a semiconductor substrate 1 and forming an upper electrode layer 3 on a part of the top surface of the lower electrode layer 2, while holes 2X extending in the direction of thickness are formed on the top surface of the lower electrode layer 2 below the upper electrode layer 3, and the depth of holes 2X is smaller than the thickness of the lower electrode layer 2.
    Type: Grant
    Filed: July 29, 2005
    Date of Patent: October 25, 2011
    Assignee: Kyocera Corporation
    Inventors: Kenichi Kato, Yoshio Shimoaka
  • Publication number: 20100252926
    Abstract: A semiconductor element that is excellent in both mechanical reliability and electrical reliability and a mounting structure for the semiconductor element are provided. The semiconductor element includes: a substrate; an electrically conductive layer on the substrate; a protective layer having an opening on the electrically conductive layer; a barrier metal layer in contact with the electrically conductive layer in the opening; and an electrically conductive bump on the barrier metal layer. The barrier metal layer contains phosphorus and has a phosphorus-rich portion that has a higher phosphorus content than the remaining portion has. The phosphorus-rich portion is located in the surface of the barrier metal layer facing the electrically conductive bump, and the thickness thereof in the periphery of the region where the electrically conductive bump is formed is larger than at the center of the region.
    Type: Application
    Filed: September 2, 2008
    Publication date: October 7, 2010
    Applicant: KYOCERA CORPORATION
    Inventors: Kenichi Kato, Yoshio Shimoaka
  • Patent number: 7638420
    Abstract: A print mask is used to form bumps on barrier metal layers of a wafer. The mask comprises a plurality of elongated perforations disposed in a linear arrangement such that paste can be applied to an object to be printed on via the perforations. Each of the perforations includes an edge disposed along the longitudinal direction, and the edge is inclined with respect to the direction perpendicular to the direction of arranging the perforations.
    Type: Grant
    Filed: April 24, 2008
    Date of Patent: December 29, 2009
    Assignee: Kyocera Corporation
    Inventor: Yoshio Shimoaka
  • Publication number: 20080241994
    Abstract: A print mask is used to form bumps on barrier metal layers of a wafer. The mask comprises a plurality of elongated perforations disposed in a linear arrangement such that paste can be applied to an object to be printed on via the perforations. Each of the perforations includes an edge disposed along the longitudinal direction, and the edge is inclined with respect to the direction perpendicular to the direction of arranging the perforations.
    Type: Application
    Filed: April 24, 2008
    Publication date: October 2, 2008
    Applicant: KYOCERA CORPORATION
    Inventor: Yoshio SHIMOAKA
  • Publication number: 20080136018
    Abstract: The semiconductor device is manufactured by forming a lower electrode layer 2 having a predetermined pattern on a semiconductor substrate 1 and forming an upper electrode layer 3 on a part of the top surface of the lower electrode layer 2, while holes 2X extending in the direction of thickness are formed on the top surface of the lower electrode layer 2 below the upper electrode layer 3, and the depth of holes 2X is smaller than the thickness of the lower electrode layer 2.
    Type: Application
    Filed: July 29, 2005
    Publication date: June 12, 2008
    Applicant: KYOCERA CORPORATION
    Inventors: Kenichi Kato, Yoshio Shimoaka
  • Patent number: 7378296
    Abstract: A print mask is used to form bumps on barrier metal layers of a wafer. The mask comprises a plurality of elongated perforations disposed in a linear arrangement such that paste can be applied to an object to be printed on via the perforations. Each of the perforations includes an edge disposed along the longitudinal direction, and the edge is inclined with respect to the direction perpendicular to the direction of arranging the perforations.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: May 27, 2008
    Assignee: Kyocera Corporation
    Inventor: Yoshio Shimoaka
  • Publication number: 20040191956
    Abstract: A print mask is used to form bumps on barrier metal layers of a wafer. The mask comprises a plurality of elongated perforations disposed in a linear arrangement such that paste can be applied to an object to be printed on via the perforations. Each of the perforations includes an edge disposed along the longitudinal direction, and the edge is inclined with respect to the direction perpendicular to the direction of arranging the perforations.
    Type: Application
    Filed: February 25, 2004
    Publication date: September 30, 2004
    Applicant: KYOCERA CORPORATION
    Inventor: Yoshio Shimoaka