Abstract: A semiconductor integrated circuit device of a master slice system having I/O cells for forming an input-output circuit formed so as to be able to select an input function or an output function, arranged in a radial layout around an internal cell array region. Each I/O cell forming region is tapered radially inward, smaller circuit elements of the I/O cell for forming the input-output circuit are disposed on the side of the internal cell array region, and larger circuit elements of the same are disposed on the side of the periphery of the semiconductor pellet. Thus, the semiconductor pellet is provided with more I/O cell forming regions than the semiconductor pellet of the same size of the conventional semiconductor integrated circuit device.

Abstract: In a semiconductor integrated circuit device produced in a master slice system, power source wirings are placed over the peripheral portion of a basic cell array and auxilliary power source wirings are extended over the basic cell array. A first power source wiring is supplied with a first power source voltage and a second power source wiring supplied with a second power source voltage, both thereof being located adjacent to the basic cell array, and are both formed on separate layers one above the other so as to overlap and parallel each other. The auxiliary power source wirings are formed one above the other, in the same wiring layers as the first power source wiring and the second power source wiring. A third power source wiring and a fourth power source wiring are disposed in the same wiring layers as the first power source wiring and the second power source wiring, so as to be juxtaposed with the first power source wiring and the second power source wiring, respectively.

Abstract: In a semiconductor integrated circuit device of master slice scheme having an internal circuit region and peripheral circuits which surround the internal circuit region, the internal circuit region including wiring channel regions and basic cell arrays in each of which a plurality of basic cells are arranged in a matrix shape. Special basic cells constructed of transistors which are larger in size than transistors constituting the basic cells are disposed at the end parts of each of the basic cell arrays, and a circuit of high driving power is manufactured using one or more of the special basic cells. In addition, those parts of an insulator film on the special basic cells which extend beyond the width lines of the basic cell array are used for the wiring channel regions.

Abstract: In an oscillation circuit consisting of an amplification circuit portion composed of transistors of input/output circuit basic cells of a gate array disposed on a semiconductor pellet and an oscillator disposed outside the semiconductor pellet, the amplification circuit portion consists of transistors for an output circuit of the input/output buffer circuit basic cells. The dielectric breakdown characteristics of the amplification circuit portion of the oscillation circuit can be improved because the structure of the transistor for the output circuit is more highly resistant to dielectric breakdown than the structure of the transistor for the input circuit.