Patents by Inventor Yoshiomi SHIINA

Yoshiomi SHIINA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11916483
    Abstract: Provided is a DC/DC converter capable of providing overvoltage protection reliably without being affected by, for example, an external element connected to an output terminal. The DC/DC converter includes a comparator, an RS-FF circuit, a drive circuit, and an ON-timer circuit, and the ON-timer circuit includes: a current source circuit which provides an electric current based on a power supply voltage; a ripple generation circuit which generates a ripple voltage; an averaging circuit which averages the ripple voltage; a timer circuit which generates an ON-timer signal; and an overvoltage protection circuit (clamp circuit).
    Type: Grant
    Filed: March 8, 2022
    Date of Patent: February 27, 2024
    Assignee: ABLIC INC.
    Inventor: Yoshiomi Shiina
  • Patent number: 11709519
    Abstract: Provided is a reference voltage circuit configured to supply a reference voltage in which a variation in voltage with respect to a variation in power supply voltage is suppressed. The reference voltage circuit includes a reference voltage generation circuit which includes an output line for supplying a generated reference voltage to an output terminal; and an output control circuit which includes an output transistor and a stabilization transistor, and is configured to control the supply of the reference voltage to the output terminal, the output transistor containing a gate to which a control voltage is to be provided, the stabilization transistor containing a gate to be connected to a source of the output transistor, and a source to be connected to a drain of the output transistor, and having a gate-source voltage that is equal to or more than a dram-source voltage in a saturation region of the output transistor.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: July 25, 2023
    Assignee: ABLIC INC.
    Inventor: Yoshiomi Shiina
  • Patent number: 11676789
    Abstract: Provided is a semiconductor device capable of detecting an abnormal state in which two fuses are both short-circuited or cut. The semiconductor device includes: a trimming circuit having a first fuse and a second fuse connected in series; a current source circuit configured to supply current to the trimming circuit; and a determination circuit configured to determine whether a connection state or disconnect state of the first fuse and the second fuse are abnormal or not based upon signals derived from an output signal of the trimming circuit.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: June 13, 2023
    Assignee: ABLIC Inc.
    Inventors: Yoshiomi Shiina, Kenji Yoshida
  • Patent number: 11626802
    Abstract: A DC-DC converter of a synchronous rectification type includes a synchronous rectification transistor and a backflow detection circuit which detects a reverse current based on a voltage across the synchronous rectification transistor. The backflow detection circuit includes a first-stage differential input circuit including a first transistor, a first resistor, a second transistor, a second resistor and a fifth transistor, and a second-stage differential input circuit including a third transistor and a fourth transistor. The fifth transistor is of a same conductive type as the synchronous rectification transistor and contains a drain connected to the other end of the first resistor with respect to an end connected to the first transistor.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: April 11, 2023
    Assignee: ABLIC Inc.
    Inventor: Yoshiomi Shiina
  • Patent number: 11482976
    Abstract: A differential amplifier includes first and second MOS transistors of a first conductivity type which constitute a differential input circuit, a bias current source which supplies a bias current to the first and second MOS transistors, and a third MOS transistor of the first conductivity type provided between the bias current source and the first and second MOS transistors and constituted to limit a back-gate voltage of the first and second MOS transistors.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: October 25, 2022
    Assignee: ABLIC INC.
    Inventor: Yoshiomi Shiina
  • Publication number: 20220294348
    Abstract: Provided is a DC/DC converter capable of providing overvoltage protection reliably without being affected by, for example, an external element connected to an output terminal. The DC/DC converter includes a comparator, an RS-FF circuit, a drive circuit, and an ON-timer circuit, and the ON-timer circuit includes: a current source circuit which provides an electric current based on a power supply voltage; a ripple generation circuit which generates a ripple voltage; an averaging circuit which averages the ripple voltage; a timer circuit which generates an ON-timer signal; and an overvoltage protection circuit (clamp circuit).
    Type: Application
    Filed: March 8, 2022
    Publication date: September 15, 2022
    Inventor: Yoshiomi SHIINA
  • Publication number: 20220069717
    Abstract: A DC-DC converter of a synchronous rectification type includes a synchronous rectification transistor and a backflow detection circuit which detects a reverse current based on a voltage across the synchronous rectification transistor. The backflow detection circuit includes a first-stage differential input circuit including a first transistor, a first resistor, a second transistor, a second resistor and a fifth transistor, and a second-stage differential input circuit including a third transistor and a fourth transistor. The fifth transistor is of a same conductive type as the synchronous rectification transistor and contains a drain connected to the other end of the first resistor with respect to an end connected to the first transistor.
    Type: Application
    Filed: July 30, 2021
    Publication date: March 3, 2022
    Applicant: ABLIC Inc.
    Inventor: Yoshiomi SHIINA
  • Publication number: 20220057825
    Abstract: Provided is a reference voltage circuit configured to supply a reference voltage in which a variation in voltage with respect to a variation in power supply voltage is suppressed. The reference voltage circuit includes a reference voltage generation circuit which includes an output line for supplying a generated reference voltage to an output terminal; and an output control circuit which includes an output transistor and a stabilization transistor, and is configured to control the supply of the reference voltage to the output terminal, the output transistor containing a gate to which a control voltage is to be provided, the stabilization transistor containing a gate to be connected to a source of the output transistor, and a source to be connected to a drain of the output transistor, and having a gate-source voltage that is equal to or more than a dram-source voltage in a saturation region of the output transistor.
    Type: Application
    Filed: August 19, 2021
    Publication date: February 24, 2022
    Inventor: Yoshiomi SHIINA
  • Publication number: 20220045602
    Abstract: Provided is an overheat protection circuit with improved accuracy of overheat detection. The overheat protection circuit includes: an input terminal; an output terminal; a first transistor containing a first terminal, a second terminal, and a control terminal, the first transistor being switchable between ON and OFF; and a first NPN transistor containing a base to be connected to a node between the second terminal of the first transistor and the ground terminal, an emitter to be connected to the ground terminal, and a collector to be supplied with a constant current and connected to the output terminal, the first NPN transistor being switchable between ON and OFF in accordance with a voltage level of a reference voltage to be supplied to the base, the reference voltage having a temperature characteristic of having a temperature coefficient of zero or more.
    Type: Application
    Filed: August 4, 2021
    Publication date: February 10, 2022
    Inventor: Yoshiomi Shiina
  • Publication number: 20210304997
    Abstract: Provided is a semiconductor device capable of detecting an abnormal state in which two fuses are both short-circuited or cut. The semiconductor device includes: a trimming circuit having a first fuse and a second fuse connected in series; a current source circuit configured to supply current to the trimming circuit; and a determination circuit configured to determine whether a connection state or disconnect state of the first fuse and the second fuse are abnormal or not based upon signals derived from an output signal of the trimming circuit.
    Type: Application
    Filed: March 24, 2021
    Publication date: September 30, 2021
    Inventors: Yoshiomi SHIINA, Kenji YOSHIDA
  • Publication number: 20210250005
    Abstract: A differential amplifier includes first and second MOS transistors of a first conductivity type which constitute a differential input circuit, a bias current source which supplies a bias current to the first and second MOS transistors, and a third MOS transistor of the first conductivity type provided between the bias current source and the first and second MOS transistors and constituted to limit a back-gate voltage of the first and second MOS transistors.
    Type: Application
    Filed: January 28, 2021
    Publication date: August 12, 2021
    Inventor: Yoshiomi SHIINA
  • Patent number: 11073856
    Abstract: An input circuit includes a first input transistor and a second input transistor connected to an input terminal; a current source which makes a current flow in the second input transistor through a current mirror; a switch provided between the current mirror and the current source, and having a switch control terminal connected to the drain of the first input transistor; and a transistor connected to the first input transistor, on/off of the transistor being controlled by an output signal, wherein a current drivability of the second input transistor is switched by an output signal, and a threshold voltage to the input signal is determined based on the current drivability of the second input transistor and the current source.
    Type: Grant
    Filed: January 23, 2020
    Date of Patent: July 27, 2021
    Assignee: ABLIC INC.
    Inventors: Yoshiomi Shiina, Fumimasa Azuma
  • Publication number: 20200249710
    Abstract: An input circuit includes a first input transistor and a second input transistor connected to an input terminal; a current source which makes a current flow in the second input transistor through a current mirror; a switch provided between the current mirror and the current source, and having a switch control terminal connected to the drain of the first input transistor; and a transistor connected to the first input transistor, on/off of the transistor being controlled by an output signal, wherein a current drivability of the second input transistor is switched by an output signal, and a threshold voltage to the input signal is determined based on the current drivability of the second input transistor and the current source.
    Type: Application
    Filed: January 23, 2020
    Publication date: August 6, 2020
    Inventors: Yoshiomi SHIINA, Fumimasa Azuma
  • Patent number: 9608521
    Abstract: Provided is a DC/DC converter capable of operating a circuit to perform stable control even when an output voltage becomes 0 V at the time of activation of a power supply voltage or due to a load short circuit. The DC/DC converter includes an ON-timer circuit including: a ripple generation circuit configured to generate and output a ripple component based on a control signal; an averaging circuit configured to output a signal obtained by averaging an output of the ripple generation circuit; a timer circuit configured to generate and output an ON-time signal based on the signal of the averaging circuit and the control signal; and an activation circuit configured to increase a voltage of an output terminal of the ripple generation circuit to a predetermined voltage.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: March 28, 2017
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventors: Yoshiomi Shiina, Masayuki Uno
  • Patent number: 9479054
    Abstract: Provided is a DC/DC converter capable of immediately resuming to a normal operation from a state in which an output transistor is continued to be turned off when a reverse current is generated in a light load state. The DC/DC converter includes an ON-timer circuit including: a ripple generation circuit; a smoothing circuit; a timer circuit configured to output an ON-time signal; a logic circuit configured to detect a sign of generation of a reverse current; and a switch circuit configured to, based on a detection signal of the logic circuit, maintain an output voltage of the ripple generation circuit or control the output voltage of the ripple generation circuit to a predetermined voltage.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: October 25, 2016
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventors: Yoshiomi Shiina, Masayuki Uno
  • Patent number: 9374007
    Abstract: Provided is a DC/DC converter that is capable of performing stable control without being affected by noise from an output voltage and without any malfunction and is capable of operating at a relatively constant frequency. The DC/DC converter includes an ON-timer circuit configured to input a control signal, which is synchronized with a signal input to a gate of an output transistor, and output an ON-time signal. The ON-timer circuit includes: a ripple generation circuit configured to generate and output a ripple component based on the control signal; an averaging circuit configured to output a signal obtained by averaging the ripple component; and a timer circuit configured to generate and output the ON-time signal based on the signal of the averaging circuit and the control signal.
    Type: Grant
    Filed: March 10, 2015
    Date of Patent: June 21, 2016
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventors: Yoshiomi Shiina, Masayuki Uno
  • Publication number: 20150263622
    Abstract: Provided is a DC/DC converter that is capable of performing stable control without being affected by noise from an output voltage and without any malfunction and is capable of operating at a relatively constant frequency. The DC/DC converter includes an ON-timer circuit configured to input a control signal, which is synchronized with a signal input to a gate of an output transistor, and output an ON-time signal. The ON-timer circuit includes: a ripple generation circuit configured to generate and output a ripple component based on the control signal; an averaging circuit configured to output a signal obtained by averaging the ripple component; and a timer circuit configured to generate and output the ON-time signal based on the signal of the averaging circuit and the control signal.
    Type: Application
    Filed: March 10, 2015
    Publication date: September 17, 2015
    Inventors: Yoshiomi SHIINA, Masayuki UNO
  • Publication number: 20150263623
    Abstract: Provided is a DC/DC converter capable of immediately resuming to a normal operation from a state in which an output transistor is continued to be turned off when a reverse current is generated in a light load state. The DC/DC converter includes an ON-timer circuit including: a ripple generation circuit; a smoothing circuit; a timer circuit configured to output an ON-time signal; a logic circuit configured to detect a sign of generation of a reverse current; and a switch circuit configured to, based on a detection signal of the logic circuit, maintain an output voltage of the ripple generation circuit or control the output voltage of the ripple generation circuit to a predetermined voltage.
    Type: Application
    Filed: March 10, 2015
    Publication date: September 17, 2015
    Inventors: Yoshiomi SHIINA, Masayuki UNO
  • Publication number: 20150263616
    Abstract: Provided is a DC/DC converter capable of operating a circuit to perform stable control even when an output voltage becomes 0 V at the time of activation of a power supply voltage or due to a load short circuit. The DC/DC converter includes an ON-timer circuit including: a ripple generation circuit configured to generate and output a ripple component based on a control signal; an averaging circuit configured to output a signal obtained by averaging an output of the ripple generation circuit; a timer circuit configured to generate and output an ON-time signal based on the signal of the averaging circuit and the control signal; and an activation circuit configured to increase a voltage of an output terminal of the ripple generation circuit to a predetermined voltage.
    Type: Application
    Filed: March 10, 2015
    Publication date: September 17, 2015
    Inventors: Yoshiomi SHIINA, Masayuki UNO
  • Patent number: 9059697
    Abstract: A drive circuit including a second switching element that is connected in series to a source of a first switching element, that is switched ON when the first switching element is switched ON, and that is switched OFF when the first switching element is switched OFF. The drive circuit includes a conduction element that is provided between a drain of the second switching element and a power line, and that connects the drain of the second switching element to the power line in accordance with a signal that switches the second switching element OFF.
    Type: Grant
    Filed: March 28, 2014
    Date of Patent: June 16, 2015
    Assignee: FUJITSU SEMICONDUCTOR LIMITED
    Inventor: Yoshiomi Shiina