Abstract: A probe card has a thin film substrate having projection electrodes on a first surface facing the semiconductor wafer and at a position facing the pad electrodes, a non-contact electrode, and first electrodes provided a second surface opposite to the first surface; and a wiring substrate having second electrodes disposed at a side opposite to the semiconductor wafer in the thin film substrate and at a position facing the first electrodes. The wiring substrate and the thin film substrate form a first sealed space and the thin film substrate and the semiconductor wafer form a second sealed space. By reducing the pressure in the first and the second sealed space, the first and the second electrodes are brought into close contact with each other and the pad electrodes and the projection electrodes are brought into close contact with each other, and the pressure of each of the first and second sealed space can be independently adjusted.

Abstract: A wafer inspection device, which inspects the electrical properties of a semiconductor wafer on which a semiconductor integrated circuit is formed, and the wafer inspection device has: a holding mechanism for holding a probe card; a wafer stage that holds the semiconductor wafer on the upper surface and is movably provided; and a pressing mechanism that are held and press the wafer stage against the probe card. The wafer stage is provided on the outer periphery with a seal ring. The seal ring forms a sealed space in a state where the wafer and the probe card are brought close to each other by contacting the probe card and is provided in such a manner as to reduce the pressure of the sealed space.

Abstract: A probe comprises: a membrane having a bump which contacts an input/output terminal of an IC device built into a semiconductor wafer under test; a pitch conversion board having a bottom surface on which a first terminal is provided and a top surface on which a second terminal connected to the first terminal is provided; a circuit board which is electrically connected to a test head and has a third terminal; a first anisotropic conductive rubber member having a first conductor part which electrically connects the bump of the membrane and the first terminal of the pitch conversion board; and a second anisotropic conductive rubber member having a second conductor part which electrically connects the second terminal of the pitch conversion board and the third terminal of the circuit board, and the second conductor parts are provided on the whole of the second anisotropic conductive rubber member.

Abstract: A wafer inspection device, which inspects the electrical properties of a semiconductor wafer on which a semiconductor integrated circuit is formed, and the wafer inspection device has: a holding mechanism for holding a probe card; a wafer stage that holds the semiconductor wafer on the upper surface and is movably provided; and a pressing mechanism that are held and press the wafer stage against the probe card. The wafer stage is provided on the outer periphery with a seal ring. The seal ring forms a sealed space in a state where the wafer and the probe card are brought close to each other by contacting the probe card and is provided in such a manner as to reduce the pressure of the sealed space.

Abstract: A probe card for a wafer level test of electrical characteristics of a plurality of semiconductor integrated circuit devices formed on a semiconductor wafer. The card has a thin film with bumps on which a plurality of bumps to be respectively brought into contact with all of inspection electrodes of the semiconductor integrated circuit devices are formed, and which is held on a rigid ceramic ring. An alignment mark constituted by a bump formed simultaneously with the bumps for contact is added to the thin film with bumps. The desired position of the alignment mark relative to the bumps for contact is maintained. Therefore, a change in position accuracy of the bumps for contact can be easily measured by an image processor with reference to the alignment mark. An optimum position for contact between the wafer to be inspected and the inspection electrodes on the wafer can be computed from the measurement result.

Abstract: A wafer inspection device, which inspects the electrical properties of a semiconductor wafer on which a semiconductor integrated circuit is formed, and the wafer inspection device has: a holding mechanism for holding a probe card; a wafer stage that holds the semiconductor wafer on the upper surface and is movably provided; and a pressing mechanism that are held and press the wafer stage against the probe card. The wafer stage is provided on the outer periphery with a seal ring. The seal ring forms a sealed space in a state where the wafer and the probe card are brought close to each other by contacting the probe card and is provided in such a manner as to reduce the pressure of the sealed space.

Abstract: A probe card has a thin film substrate having projection electrodes on a first surface facing the semiconductor wafer and at a position facing the pad electrodes, a non-contact electrode, and first electrodes provided a second surface opposite to the first surface; and a wiring substrate having second electrodes disposed at a side opposite to the semiconductor wafer in the thin film substrate and at a position facing the first electrodes. The wiring substrate and the thin film substrate form a first sealed space and the thin film substrate and the semiconductor wafer form a second sealed space. By reducing the pressure in the first and the second sealed space, the first and the second electrodes are brought into close contact with each other and the pad electrodes and the projection electrodes are brought into close contact with each other, and the pressure of each of the first and second sealed space can be independently adjusted.

Abstract: Provided is a probe card for semiconductor IC test on one principal surface of which are formed a plurality of probe electrodes, such as bump electrodes (5), and which has, in a peripheral portion thereof, a thin film sheet (9) fixed to a support, such as a ceramics ring (7). A local tension-changed portion (12) is formed in the thin film sheet (9) fixed to the ceramics ring (7) so that a tensile strain is generated, and the plurality of bump electrodes (5) are arranged in prescribed positions that connect electrically to electrodes of each semiconductor IC element of the semiconductor wafer. The tensile strain of the thin film sheet (9) is changed positively and in a sustained manner, whereby the bump electrodes (5) are rearranged in desired positions.

Abstract: According to the present invention, the outputs of the last scanning flip-flop circuits 12 included in scan chains 111 are compiled and compressed in an output compression circuit 112, a sum of the outputs from the scan chains 111 and an expected value written in an expected value storage circuit 113 from the outside are compared with each other in an expected value decision circuit 114, the sum being outputted from the output compression circuit 112, a pass/fail decision result obtained by the comparison can be outputted from an output terminal 116 of the expected value decision circuit 114 to the outside, and the decision result can be stored regardless of the reset of a system.

Abstract: A probe card for a wafer level test of electrical characteristics of a plurality of semiconductor integrated circuit devices formed on a semiconductor wafer. The card has a thin film with bumps on which a plurality of bumps to be respectively brought into contact with all of inspection electrodes of the semiconductor integrated circuit devices are formed, and which is held on a rigid ceramic ring. An alignment mark constituted by a bump formed simultaneously with the bumps for contact is added to the thin film with bumps. The desired position of the alignment mark relative to the bumps for contact is maintained. Therefore, a change in position accuracy of the bumps for contact can be easily measured by an image processor with reference to the alignment mark. An optimum position for contact between the wafer to be inspected and the inspection electrodes on the wafer can be computed from the measurement result.

Abstract: A probe card for a wafer level test of electrical characteristics of a plurality of semiconductor integrated circuit devices formed on a semiconductor wafer. The card has a thin film with bumps on which a plurality of bumps to be respectively brought into contact with all of inspection electrodes of the semiconductor integrated circuit devices are formed, and which is held on a rigid ceramic ring. An alignment mark constituted by a bump formed simultaneously with the bumps for contact is added to the thin film with bumps. The desired position of the alignment mark relative to the bumps for contact is maintained. Therefore, a change in position accuracy of the bumps for contact can be easily measured by an image processor with reference to the alignment mark. An optimum position for contact between the wafer to be inspected and the inspection electrodes on the wafer can be computed from the measurement result.

Abstract: Provided is a probe card for semiconductor IC test on one principal surface of which are formed a plurality of probe electrodes, such as bump electrodes (5), and which has, in a peripheral portion thereof, a thin film sheet (9) fixed to a support, such as a ceramics ring (7). A local tension-changed portion (12) is formed in the thin film sheet (9) fixed to the ceramics ring (7) so that a tensile strain is generated, and the plurality of bump electrodes (5) are arranged in prescribed positions that connect electrically to electrodes of each semiconductor IC element of the semiconductor wafer. The tensile strain of the thin film sheet (9) is changed positively and in a sustained manner, whereby the bump electrodes (5) are rearranged in desired positions.

Abstract: According to the present invention, the outputs of the last scanning flip-flop circuits 12 included in scan chains 111 are compiled and compressed in an output compression circuit 112, a sum of the outputs from the scan chains 111 and an expected value written in an expected value storage circuit 113 from the outside are compared with each other in an expected value decision circuit 114, the sum being outputted from the output compression circuit 112, a pass/fail decision result obtained by the comparison can be outputted from an output terminal 116 of the expected value decision circuit 114 to the outside, and the decision result can be stored regardless of the reset of a system.

Abstract: Circuits under electrode terminals and a nonconductor layer of the electrode terminals in semiconductor devices are prevented from being damaged during a test, such as a burn-in test, on the semiconductor devices formed on a wafer. Alignment patterns provided on the semiconductor wafer have detector electrode terminals and conductor electrode terminals. A detector electrode terminal surrounds a conductor electrode terminal separated by a gap from the detector electrode terminals and a portion of the surrounding detector electrode terminal is open.

Abstract: A probe card for a wafer level test of electrical characteristics of a plurality of semiconductor integrated circuit devices formed on a semiconductor wafer. The card has a thin film with bumps on which a plurality of bumps to be respectively brought into contact with all of inspection electrodes of the semiconductor integrated circuit devices are formed, and which is held on a rigid ceramic ring. An alignment mark constituted by a bump formed simultaneously with the bumps for contact is added to the thin film with bumps. The desired position of the alignment mark relative to the bumps for contact is maintained. Therefore, a change in position accuracy of the bumps for contact can be easily measured by an image processor with reference to the alignment mark. An optimum position for contact between the wafer to be inspected and the inspection electrodes on the wafer can be computed from the measurement result.

Abstract: Circuits under electrode terminals and a nonconductor layer of the electrode terminals in semiconductor devices are prevented from being damaged during a test, such as a burn-in test, on the semiconductor devices formed on a wafer. Alignment patterns provided on the semiconductor wafer have detector electrode terminals and conductor electrode terminals. A detector electrode terminal surrounds a conductor electrode terminal separated by a gap from the detector electrode terminals and a portion of the surrounding detector electrode terminal is open.

Abstract: A retainer board, holding a semiconductor wafer having a plurality of integrated circuit terminals for testing a semiconductor chip, is provided in confronting relation to a probe sheet having a plurality of probe terminals electrically connected to their corresponding integrated circuit terminals. An insulating substrate, having wiring electrically connected to the plural probe terminals, is provided on the probe sheet in opposed relation to the retainer board. An elastic member is interposed between the probe sheet and the insulating substrate. The retainer board and the probe sheet are brought into so closer relationship that each integrated circuit terminal of the semiconductor wafer held by the retainer board is electrically connected to its corresponding probe terminal of the probe sheet.

Abstract: A retainer board, holding a semiconductor wafer having a plurality of integrated circuit terminals for testing a semiconductor chip, is provided in confronting relation to a probe sheet having a plurality of probe terminals electrically connected to their corresponding integrated circuit terminals. An insulating substrate, having wiring electrically connected to the plural probe terminals, is provided on the probe sheet in opposed relation to the retainer board. An elastic member is interposed between the probe sheet and the insulating substrate. The retainer board and the probe sheet are brought into so closer relationship that each integrated circuit terminal of the semiconductor wafer held by the retainer board is electrically connected to its corresponding probe terminal of the probe sheet.

Abstract: A retainer board, holding a semiconductor wafer having a plurality of integrated circuit terminals for testing a semiconductor chip, is provided in confronting relation to a probe sheet having a plurality of probe terminals electrically connected to their corresponding integrated circuit terminals. An insulating substrate, having wiring electrically connected to the plural probe terminals, is provided on the probe sheet in opposed relation to the retainer board. An elastic member is interposed between the probe sheet and the insulating substrate. The retainer board and the probe sheet are brought into so closer relationship that each integrated circuit terminal of the semiconductor wafer held by the retainer board is electrically connected to its corresponding probe terminal of the probe sheet.