Abstract: A monitoring unit connected via a communication line to monitored units and serially receiving notifying information given from each of the monitored units with time division multiplexing communications, includes a receiving unit receiving information related to each of the monitored unit via the communication line from each monitored unit, a determining unit determining a timeslot length to be allocated to each monitored unit on the basis of the information related to each of the monitored units, and a notifying unit notifying each of the monitored units of the timeslot length via the communication line, wherein the receiving unit receives the notifying information from each of the monitored units at the timeslot based on the timeslot length that is notified of each monitored unit.

Abstract: A monitoring unit connected via a communication line to monitored units and serially receiving notifying information given from each of the monitored units with time division multiplexing communications, includes a receiving unit receiving information related to each of the monitored unit via the communication line from each monitored unit, a determining unit determining a timeslot length to be allocated to each monitored unit on the basis of the information related to each of the monitored units, and a notifying unit notifying each of the monitored units of the timeslot length via the communication line, wherein the receiving unit receives the notifying information from each of the monitored units at the timeslot based on the timeslot length that is notified of each monitored unit.

Abstract: An optical amplifier to which an optical output power automatic attenuation circuit according to the present invention is applied, comprises: one amplifier board to and from which a WDM light is input and output; and a plurality of booster boards which supply pumping lights to the amplifier board, an ID pattern generated in an ID pattern generating circuit disposed in each of the booster boards is superposed on the pumping light to be sent to the amplifier board, an electric signal indicating a monitoring result of the pumping light in a light receiver disposed on the amplifier board is transmitted to each of the booster boards, it is detected in an ID coincidence detection circuit in each of the booster boards whether or not a received ID pattern contained in the electric signal is coincident with the generated ID pattern, and a connection condition of an output fiber is judged according to the detection result so that an output level of the pumping light is controlled.

Abstract: An optical amplifier to which an optical output power automatic attenuation circuit according to the present invention is applied, comprises: one amplifier board to and from which a WDM light is input and output; and a plurality of booster boards which supply pumping lights to the amplifier board, an ID pattern generated in an ID pattern generating circuit disposed in each of the booster boards is superposed on the pumping light to be sent to the amplifier board, an electric signal indicating a monitoring result of the pumping light in a light receiver disposed on the amplifier board is transmitted to each of the booster boards, it is detected in an ID coincidence detection circuit in each of the booster boards whether or not a received ID pattern contained in the electric signal is coincident with the generated ID pattern, and a connection condition of an output fiber is judged according to the detection result so that an output level of the pumping light is controlled.

Abstract: In a current-spare switching control system provided for a data processing system having a current data processor, a spare data processor, a fault supervisor for supervising the fault of these processors, and switching units for switching from the current data processor to the spare data processor or vice versa, the current-spare switching control system includes: a storage unit for temporarily storing data bits from the fault supervisor; a discrimination unit operatively connected to the storage unit and for comparing the data bits with a reference signal and outputting a coincidence signal when the data bits coincides with the reference signal; an AND gate operatively connected to the discrimination unit for inputting the coincidence signal and a write command from the fault supervisor, and outputting a write signal when the coincidence signal coincides with the write command; a register unit operatively connected to the AND gate for inputting a data bit from the fault supervisor and outputting a switching