Abstract: A semiconductor device is provided including a first electrode and a first semiconductor layer of a first conductivity type connected to the first electrode. The semiconductor device further includes a second semiconductor layer of a second conductivity type provided on the first semiconductor layer, a third semiconductor layer of the first conductivity type provided on the second semiconductor layer, and a second electrode provided on the third semiconductor layer. The semiconductor device further includes a third electrode disposed between the first electrode and the second electrode. The semiconductor device further includes a fourth electrode having an upper end connected to the second electrode, where the fourth electrode has a higher resistivity than the second electrode.

Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a conductive layer, a gate electrode, and a first electrode. The conductive layer includes a first portion, a second portion, and a third portion. The first portion is surrounded by the first semiconductor region via a first insulating portion. The second portion extends in a second direction, is provided on the first semiconductor region, and is provided on the second region. The third portion is connected between the first portion and the second portion and extends in a third direction. The first electrode is electrically connected to the third semiconductor region and the conductive layer. The second portion electrically connects the first electrode to the third portion.

Abstract: A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a third semiconductor region of the first conductivity type, a conductive layer, a gate electrode, and a first electrode. The conductive layer includes a first portion, a second portion, and a third portion. The first portion is surrounded by the first semiconductor region via a first insulating portion. The second portion extends in a second direction, is provided on the first semiconductor region, and is provided on the second region. The third portion is connected between the first portion and the second portion and extends in a third direction. The first electrode is electrically connected to the third semiconductor region and the conductive layer. The second portion electrically connects the first electrode to the third portion.

Abstract: A semiconductor device is provided including a first electrode and a first semiconductor layer of a first conductivity type connected to the first electrode. The semiconductor device further includes a second semiconductor layer of a second conductivity type provided on the first semiconductor layer, a third semiconductor layer of the first conductivity type provided on the second semiconductor layer, and a second electrode provided on the third semiconductor layer. The semiconductor device further includes a third electrode disposed between the first electrode and the second electrode. The semiconductor device further includes a fourth electrode having an upper end connected to the second electrode, where the fourth electrode has a higher resistivity than the second electrode.

Abstract: According to an embodiment, a method for manufacturing a semiconductor device includes forming a gate trench extending into a first semiconductor layer; forming a gate insulating film on an internal wall of the gate trench; forming a polysilicon in the gate trench; etching the polysilicon into the gate trench; forming an interlayer insulating film on the polysilicon; etching the first semiconductor layer so as to project the interlayer insulating film from the first semiconductor layer; forming a second semiconductor layer on the first semiconductor layer; forming a third semiconductor layer on the second semiconductor layer; forming a sidewall contacting a side face of the interlayer insulating film; forming a fourth semiconductor layer of the second conductivity type in the second semiconductor layer; and forming a first electrode electrically connected to the third semiconductor layer and the fourth semiconductor layer.

Abstract: A semiconductor device includes a first semiconductor layer that includes a first region and a second region, a second semiconductor layer that is provided on an upper side of the first semiconductor layer, a third semiconductor layer that is selectively provided on an upper side of the second semiconductor layer, a control electrode provided in the second semiconductor layer and the third semiconductor layer through an insulation film, a first conductor that is provided in the first semiconductor layer so as to be in contact with the control electrode and the first semiconductor layer through the insulation film and is positioned further on a first semiconductor layer side than the control electrode, a second conductor that extends in a direction from the third semiconductor layer to the first semiconductor layer in the second region and is provided in the first semiconductor layer through an insulation film, a first electrode that is electrically connected to the first semiconductor layer, the second semico

Abstract: According to an embodiment, a method for manufacturing a semiconductor device includes forming a gate trench extending into a first semiconductor layer; forming a gate insulating film on an internal wall of the gate trench; forming a polysilicon in the gate trench; etching the polysilicon into the gate trench; forming an interlayer insulating film on the polysilicon; etching the first semiconductor layer so as to project the interlayer insulating film from the first semiconductor layer; forming a second semiconductor layer on the first semiconductor layer; forming a third semiconductor layer on the second semiconductor layer; forming a sidewall contacting a side face of the interlayer insulating film; forming a fourth semiconductor layer of the second conductivity type in the second semiconductor layer; and forming a first electrode electrically connected to the third semiconductor layer and the fourth semiconductor layer.

Abstract: A trench gate semiconductor device including: a semiconductor layer having a first conductivity type; a first diffusion region having a second conductivity type having a planar structure on the semiconductor layer; a second diffusion region having the first conductivity type positioned selectively on the first diffusion region; a gate electrode provided via a gate insulation film in each first trench facing the second diffusion region and penetrating through the first diffusion region to reach the semiconductor layer; a first semiconductor region of the second conductivity type provided at a position, in the semiconductor layer, apart in a lateral direction from the first diffusion region; a second semiconductor region of the second conductivity type provided at a position, in the first diffusion region, between the adjacent first trenches; and a main electrode in contact with the semiconductor layer and the second diffusion region.

Abstract: According to one embodiment, a semiconductor device includes a semiconductor layer of a first conductivity type, a base region of a second conductivity type, a diffusion region of the first conductivity type, a control electrode, at least one first semiconductor region of the second conductivity type, a second semiconductor region of the second conductivity type, a first main electrode, and a second main electrode. The base region is selectively provided in a first major surface side of the semiconductor layer. The diffusion region is selectively provided in the base region. The control electrode is provided via an insulating film in a trench being in contact with the diffusion region and penetrating through the base region to the semiconductor layer. The at least one first semiconductor region extends in the semiconductor layer from the first major surface side to a second major surface side of the semiconductor layer and is spaced from the base region.

Abstract: A semiconductor device according to an embodiment of the present invention has a transistor section which includes a trench gate type transistor, and a gate line section which includes a part provided between transistor sections.

Abstract: A semiconductor device according to an embodiment of the present invention has a transistor section which includes a trench gate type transistor, and a gate line section which includes a part provided between transistor sections.

Abstract: Disclosed is a trench gate semiconductor device including: a semiconductor layer having a first conductivity type; a first diffusion region having a second conductivity type having a planar structure on the semiconductor layer; a second diffusion region having the first conductivity type positioned selectively on the first diffusion region; a gate electrode provided via a gate insulation film in each first trench facing the second diffusion region and penetrating through the first diffusion region to reach the semiconductor layer; a first semiconductor region of the second conductivity type provided at a position, in the semiconductor layer, apart in a lateral direction from the first diffusion region; a second semiconductor region of the second conductivity type provided at a position, in the first diffusion region, between the adjacent first trenches; and a main electrode in contact with the semiconductor layer and the second diffusion region.

Abstract: A semiconductor device comprises a semiconductor substrate having an upper surface and a lower surface. A semiconductor layer is formed on the upper surface of the semiconductor substrate. A base region of a first conduction type is formed in the semiconductor layer. A source region of a second conduction type is formed in the base region. A drain region of the second conduction type is formed apart from the source region in the semiconductor layer. A gate electrode is formed on a gate insulator above the semiconductor layer between the source region and the drain region. A first interlayer insulator is formed on the semiconductor layer to cover the gate electrode. A short electrode is formed to short the base region and the source region. A second interlayer insulator is formed to cover the first interlayer insulator and the short electrode.

Abstract: A semiconductor device includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type provided on the first semiconductor layer; a plurality of first trenches passing through the second semiconductor layer and reaching the first semiconductor layer; a gate insulating film provided on an inner wall of the first trench; and a gate electrode filling in the first trench via the gate insulating film. A PN junction interface is provided between the first semiconductor layer and the second semiconductor layer. A distance from an upper face of the second semiconductor layer to the PN junction interface is minimized nearly at a center between the first trenches.

Abstract: Disclosed is a semiconductor device including a base region having a first conductive type, a drain region and a source region having a second conductive type, a gate insulation film and a gate electrode formed on a channel formation region and on a part of the drain region and the source region, a short electrode formed to include a top of another part of the source region, with contact length being 0.4 ?m to 0.8 ?m in a part of maximum length with the source region in a direction in which the source region is opposed to the drain region, and a fourth region having the first conductive type and a higher impurity concentration than the base region, provided at an opposite side of the source region from a side opposed to the drain region and at an underside of the short electrode to be adjacent to the base region.

Abstract: A semiconductor device comprises a semiconductor substrate having an upper surface and a lower surface. A semiconductor layer is formed on the upper surface of the semiconductor substrate. A base region of a first conduction type is formed in the semiconductor layer. A source region of a second conduction type is formed in the base region. A drain region of the second conduction type is formed apart from the source region in the semiconductor layer. A gate electrode is formed on a gate insulator above the semiconductor layer between the source region and the drain region. A first interlayer insulator is formed on the semiconductor layer to cover the gate electrode. A short electrode is formed to short the base region and the source region. A second interlayer insulator is formed to cover the first interlayer insulator and the short electrode.

Abstract: In a semiconductor layer of the first conductivity type, a first diffusion region of the second conductivity type is formed which includes a low resistance layer and a high resistance layer. This semiconductor layer of the first conductivity type has its thickness that is less than or equal to the lateral width of the high resistance layer.

Abstract: In a semiconductor layer of the first conductivity type, a first diffusion region of the second conductivity type is formed which includes a low resistance layer and a high resistance layer. This semiconductor layer of the first conductivity type has its thickness that is less than or equal to the lateral width of the high resistance layer.

Abstract: A semiconductor device comprises a field effect transistor and a schottky-barrier diode mounted in the same semiconductor substrate, the semiconductor device having buried doped layers buried at a predetermined interval in a drift layer of a first conductivity type in a schottky-barrier diode region so as to have a predetermined depth, the buried doped layers having a second conductivity type.

Abstract: A semiconductor device comprises a first semiconductor layer of a first conductivity type provided on a semiconductor substrate of the first conductivity type, a base layer of a second conductivity type provided in the first semiconductor layer, for defining a vertical MISFET including source regions and a gate electrode on a gate insulation film, a Schottky barrier diode (SBD)-forming region provided in the first semiconductor layer around the base layer, a guard ring region of the second conductivity type provided around SBD-forming region, a first main electrode disposed above the first semiconductor layer and provided in common as both a source electrode of the MISFET and an anode of the SBD, a surface gate electrode disposed above the first semiconductor layer, and a second main electrode provided in common as a drain electrode of the MISFET and a cathode of the SBD.