Patents by Inventor Yoshitaka Kadowaki
Yoshitaka Kadowaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150069583Abstract: Provided are a III nitride semiconductor device which can be operated at a lower voltage can be provided, in which device a good ohmic contact is achieved between the (000-1) plane side of the III nitride semiconductor layer and the electrode and a method of producing the III nitride semiconductor device. A III nitride semiconductor device of the present invention includes a plurality of protrusions rounded like domes in a predetermined region on the (000-1) plane side of the III nitride semiconductor layer; and an electrode on the upper surface of the predetermined region.Type: ApplicationFiled: December 12, 2012Publication date: March 12, 2015Inventors: Yoshitaka Kadowaki, Tatsunori Toyota
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Patent number: 8963290Abstract: The purpose of the present invention is to provide a good ohmic contact for an n-type Group-III nitride semiconductor. An n-type GaN layer and a p-type GaN layer are aequentially formed on a lift-off layer (growth step). A p-side electrode is formed on the top face of the p-type GaN layer. A copper block is formed over the entire area of the top face through a cap metal. Then, the lift-off layer is removed by making a chemical treatment (lift-off step). Then, a laminate structure constituted by the n-type GaN layer, with which the surface of the N polar plane has been exposed, and the p-type GaN layer is subjected to anisotropic wet etching (surface etching step). The N-polar surface after the etching has irregularities constituted by {10-1-1} planes. Then, an n-side electrode is formed on the bottom face of the n-type GaN layer (electrode formation step).Type: GrantFiled: December 28, 2010Date of Patent: February 24, 2015Assignees: Dowa Electronics Materials Co., Ltd., Wavesquare Inc.Inventors: Ryuichi Toba, Yoshitaka Kadowaki, Meoung Whan Cho, Seog Woo Lee, Pil Guk Jang
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Vertically structured group III nitride semiconductor LED chip and method for manufacturing the same
Patent number: 8962362Abstract: A method for manufacturing vertically structured Group III nitride semiconductor LED chips includes a step of forming a light emitting laminate on a growth substrate; a step of forming a plurality of separate light emitting structures by partially removing the light emitting laminate to partially expose the growth substrate; a step of forming a conductive support on the plurality of light emitting structures; a step of lifting off the growth substrate from the plurality of light emitting structures; and a step of cutting the conductive support thereby singulating a plurality of LED chips each having the light emitting structure. The step of partially removing the light emitting laminate is performed such that each of the plurality of light emitting structures has a top view shape of a circle or a 4n-gon (“n” is a positive integer) having rounded corners.Type: GrantFiled: November 5, 2009Date of Patent: February 24, 2015Assignees: Wavesquare Inc., Dowa Electronics Materials Co., Ltd.Inventors: Meoung Whan Cho, Seog Woo Lee, Pil Guk Jang, Ryuichi Toba, Tatsunori Toyota, Yoshitaka Kadowaki -
Patent number: 8878189Abstract: An object of the present invention is to provide a Group III nitride semiconductor epitaxial substrate, a Group III nitride semiconductor element, and a Group III nitride semiconductor free-standing substrate, which have good crystallinity, with not only AlGaN, GaN, and GaInN the growth temperature of which is 1050° C. or less, but also with AlxGa1-xN having a high Al composition, the growth temperature of which is high; a Group III nitride semiconductor growth substrate used for producing these, and a method for efficiently producing those. The present invention provides a Group III nitride semiconductor growth substrate comprising a crystal growth substrate including a surface portion composed of a Group III nitride semiconductor which contains at least Al, and a scandium nitride film formed on the surface portion are provided.Type: GrantFiled: March 25, 2010Date of Patent: November 4, 2014Assignees: Dowa Holdings Co., Ltd., Dowa Electronics Materials Co., Ltd.Inventors: Ryuichi Toba, Masahito Miyashita, Tatsunori Toyota, Yoshitaka Kadowaki
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VERTICALLY STRUCTURED GROUP III NITRIDE SEMICONDUCTOR LED CHIP AND METHOD FOR MANUFACTURING THE SAME
Publication number: 20140319557Abstract: A method for manufacturing a vertically structured Group III nitride semiconductor LED chip includes a first step of forming a light emitting structure laminate; a second step of forming a plurality of separate light emitting structures by partially removing the light emitting structure laminate to partially expose the growth substrate; a third step of forming a conductive support, which conductive support integrally supporting the light emitting structures; a fourth step of separating the growth substrate by removing the lift-off layer; and a fifth step of dividing the conductive support between the light emitting structures thereby singulating a plurality of LED chips each having the light emitting structure. A first through-hole is formed to open in a central region of each of the light emitting structures such that at least the lift-off layer is exposed, and an etchant is supplied from the first through-hole in the fourth step.Type: ApplicationFiled: May 12, 2011Publication date: October 30, 2014Applicants: DOWA ELECTRONICS MATERIALS CO., LTD., WAVESQUARE INC.Inventors: Meoung Whan Cho, Seog Woo Lee, Pil Guk Jang, Ryuichi Toba, Yoshitaka Kadowaki -
Publication number: 20140284770Abstract: The method of manufacturing a semiconductor device according to the present invention includes: a step of forming a semiconductor laminate on a growth substrate with a lift-off layer therebetween; a step of providing grooves in a grid pattern in the semiconductor laminate, thereby forming a plurality of semiconductor structures each having a nearly quadrangular transverse cross-sectional shape; a step of forming a conductive support body; and a step of removing the lift-off layer using a chemical lift-off process, in which step, in supplying an etchant to the grooves via through-holes provided in a portion above the grooves, the lift-off layer is etched from only one side surface of each semiconductor structure.Type: ApplicationFiled: September 28, 2011Publication date: September 25, 2014Applicants: DOWA ELECTRONICS MATERIALS CO., LTD., BBSA LIMITEDInventors: Meoung Whan Cho, Seog Woo Lee, Ryuichi Toba, Yoshitaka Kadowaki
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Publication number: 20140217457Abstract: There is provided a light-emitting element chip which can be safely assembled and a manufacturing method therefor. A light-emitting element chip 10 has a semiconductor layer 12 including a luminescent layer 12a on a supporting portion 11. The supporting portion 11 has a concave shape, providing a support substrate in this light-emitting element chip 10, and being connected to one electrode on the semiconductor layer 12. The outer peripheral portion of the supporting portion 11 (a supporting portion outer peripheral portion 11a) surrounds the semiconductor layer 12, and is protruded to be set at a level higher than the other face 12d and the n-side electrode 15 of the semiconductor layer 12.Type: ApplicationFiled: May 25, 2011Publication date: August 7, 2014Applicants: WAVESQUARE INC., DOWA ELECTRONICS MATERIALS CO., LTD.Inventors: Meoung Whan Cho, Seog Woo Lee, Pil Guk Jang, Ryuichi Toba, Yoshitaka Kadowaki
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Patent number: 8765584Abstract: A semiconductor device and a manufacturing method therefor, wherein, during lift-off, no cracks due to internal stresses occur in the compound semiconductor layer. A method for manufacturing a semiconductor device having a structure in which a semiconductor layer is bonded on a supporting substrate, including: a device region formation step of forming a device region including the semiconductor layer on a growth substrate through a lift-off layer; a columnar member formation step of forming a columnar member on the growth substrate; a bonding step of bonding the tops of the semiconductor layer and the columnar member to a supporting substrate; a lift-off step of separating the bottom face of the semiconductor layer from the growth substrate by removing the lift-off layer, and not separating the columnar member from the growth substrate; and a step of separating the columnar member from the supporting substrate.Type: GrantFiled: July 26, 2011Date of Patent: July 1, 2014Assignee: Dowa Electronics Materials Co., Ltd.Inventors: Yoshitaka Kadowaki, Tatsunori Toyota
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Publication number: 20140015105Abstract: The purpose of the present invention is to provide a good ohmic contact for an n-type Group-III nitride semiconductor. An n-type GaN layer and a p-type GaN layer are aequentially formed on a lift-off layer (growth step). A p-side electrode is formed on the top face of the p-type GaN layer. A copper block is formed over the entire area of the top face through a cap metal. Then, the lift-off layer is removed by making a chemical treatment (lift-off step). Then, a laminate structure constituted by the n-type GaN layer, with which the surface of the N polar plane has been exposed, and the p-type GaN layer is subjected to anisotropic wet etching (surface etching step). The N-polar surface after the etching has irregularities constituted by {10-1-1} planes. Then, an n-side electrode is formed on the bottom face of the n-type GaN layer (electrode formation step).Type: ApplicationFiled: December 28, 2010Publication date: January 16, 2014Applicants: WAVESQUARE INC., DOWA ELECTRONICS MATERIALS CO., LTD.Inventors: Ryuichi Toba, Yoshitaka Kadowaki, Meoung Whan Cho, Seog Woo Lee, Pil Guk Jang
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VERTICALLY STRUCTURED GROUP III NITRIDE SEMICONDUCTOR LED CHIP AND METHOD FOR MANUFACTURING THE SAME
Publication number: 20140001511Abstract: A method for manufacturing vertically structured Group III nitride semiconductor LED chips includes a step of forming a light emitting laminate on a growth substrate; a step of forming a plurality of separate light emitting structures by partially removing the light emitting laminate to partially expose the growth substrate; a step of forming a conductive support on the plurality of light emitting structures; a step of lifting off the growth substrate from the plurality of light emitting structures; and a step of cutting the conductive support thereby singulating a plurality of LED chips each having the light emitting structure. The step of partially removing the light emitting laminate is performed such that each of the plurality of light emitting structures has a top view shape of a circle or a 4n-gon (“n” is a positive integer) having rounded corners.Type: ApplicationFiled: September 4, 2013Publication date: January 2, 2014Applicants: DOWA ELECTRONICS MATERIALS CO., LTD., WAVESQUARE INC.Inventors: Meoung Whan CHO, Seog Woo LEE, Pil Guk JANG, Ryuichi TOBA, Tatsunori TOYOTA, Yoshitaka KADOWAKI -
Publication number: 20120256327Abstract: A semiconductor device and a manufacturing method therefor, wherein, during lift-off, no cracks due to internal stresses occur in the compound semiconductor layer. A method for manufacturing a semiconductor device having a structure in which a semiconductor layer is bonded on a supporting substrate, including: a device region formation step of forming a device region including the semiconductor layer on a growth substrate through a lift-off layer; a columnar member formation step of forming a columnar member on the growth substrate; a bonding step of bonding the tops of the semiconductor layer and the columnar member to a supporting substrate; a lift-off step of separating the bottom face of the semiconductor layer from the growth substrate by removing the lift-off layer, and not separating the columnar member from the growth substrate; and a step of separating the columnar member from the supporting substrate.Type: ApplicationFiled: July 26, 2011Publication date: October 11, 2012Applicant: DOWA ELECTRONICS MATERIALS CO., LTD.Inventors: Yoshitaka Kadowaki, Tatsunori Toyota
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VERTICALLY STRUCTURED GROUP III NITRIDE SEMICONDUCTOR LED CHIP AND METHOD FOR MANUFACTURING THE SAME
Publication number: 20120248458Abstract: A method for manufacturing vertically structured Group III nitride semiconductor LED chips includes a step of forming a light emitting laminate on a growth substrate; a step of forming a plurality of separate light emitting structures by partially removing the light emitting laminate to partially expose the growth substrate; a step of forming a conductive support on the plurality of light emitting structures; a step of lifting off the growth substrate from the plurality of light emitting structures; and a step of cutting the conductive support thereby singulating a plurality of LED chips each having the light emitting structure. The step of partially removing the light emitting laminate is performed such that each of the plurality of light emitting structures has a top view shape of a circle or a 4n-gon en” is a positive integer) having rounded corners.Type: ApplicationFiled: November 5, 2009Publication date: October 4, 2012Applicants: DOWA ELECTRONICS MATERIALS CO., LTD., WAVESQUARE INC.Inventors: Meoung Whan Cho, Seog Woo Lee, Pil Guk Jang, Ryuichi Toba, Tatsunori Toyota, Yoshitaka Kadowaki -
Publication number: 20120061683Abstract: An object of the present invention is to provide a Group III nitride semiconductor epitaxial substrate, a Group III nitride semiconductor element, and a Group III nitride semiconductor free-standing substrate, which have good crystallinity, with not only AlGaN, GaN, and GaInN the growth temperature of which is 1050° C. or less, but also with AlxGa1-xN having a high Al composition, the growth temperature of which is high; a Group III nitride semiconductor growth substrate used for producing these, and a method for efficiently producing those. The present invention provides a Group III nitride semiconductor growth substrate comprising a crystal growth substrate including a surface portion composed of a Group III nitride semiconductor which contains at least Al, and a scandium nitride film formed on the surface portion are provided.Type: ApplicationFiled: March 25, 2010Publication date: March 15, 2012Applicants: DOWA ELECTRONICS MATERIALS CO., LTD., DOWA HOLDINGS CO., LTD.Inventors: Ryuichi Toba, Masahito Miyashita, Tatsunori Toyota, Yoshitaka Kadowaki
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Patent number: D703862Type: GrantFiled: March 27, 2013Date of Patent: April 29, 2014Assignees: Wavesquare Inc., Dowa Electronics Materials Co., Ltd.Inventors: Meoung Whan Cho, Seog Woo Lee, Ryuichi Toba, Yoshitaka Kadowaki
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Patent number: D703863Type: GrantFiled: March 27, 2013Date of Patent: April 29, 2014Assignees: Wavesquare Inc., Dowa Electronics Materials Co., Ltd.Inventors: Meoung Whan Cho, Seog Woo Lee, Ryuichi Toba, Yoshitaka Kadowaki
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Patent number: D711581Type: GrantFiled: March 26, 2012Date of Patent: August 19, 2014Assignees: Wavesquare Inc., Dowa Electronics Materials Co., Ltd.Inventors: Meoung Whan Cho, Seog Woo Lee, Ryuichi Toba, Yoshitaka Kadowaki
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Patent number: D711582Type: GrantFiled: March 26, 2012Date of Patent: August 19, 2014Assignees: Wavesquare Inc., Dowa Electronics Materials Co., Ltd.Inventors: Meoung Whan Cho, Seog Woo Lee, Ryuichi Toba, Yoshitaka Kadowaki
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Patent number: D711583Type: GrantFiled: March 26, 2012Date of Patent: August 19, 2014Assignees: Wavesquare Inc., Dowa Electronics Materials Co., Ltd.Inventors: Meoung Whan Cho, Seog Woo Lee, Ryuichi Toba, Yoshitaka Kadowaki