Patents by Inventor Yoshitaka Kitao

Yoshitaka Kitao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7930575
    Abstract: A power supply unit is arranged between a CPU and a power supply device for supplying power to the CPU. Information necessary in proceeding with a program is evacuated from the CPU to an information holding unit. When a power shutdown factor is generated, a power supply control unit outputs a shutdown request signal to the CPU. The CPU, upon receiving the shutdown request signal, activates a power shutdown microprogram, evacuates the information necessary in proceeding with the program to the information holding unit, and outputs an evacuation completed signal to the power supply control unit after the evacuation is completed. Upon receiving the evacuation completed signal, the power supply control unit outputs a power shutdown control signal to the power supply unit. Upon receiving the power shutdown control signal from the power supply control unit, the power supply unit shuts down power supply to the CPU.
    Type: Grant
    Filed: September 10, 2007
    Date of Patent: April 19, 2011
    Assignee: Panasonic Corporation
    Inventors: Yukari Suginaka, Toshifumi Hamaguchi, Yoshitaka Kitao, Shinya Muramatsu
  • Patent number: 7633351
    Abstract: A differential amplifier circuit includes: a differential transistor pair composed of first and second transistors; a first resistance connected to a junction point of the first and second transistors at one terminal and to a first voltage node at the other terminal; second and third resistances provided between the first and second transistors, respectively, and a second voltage node; and first and second passive circuits respectively connected to the second and third resistances, the load characteristics of the passive circuits changing according to a control signal supplied. A ring oscillator is composed of a plurality of such differential amplifier circuits connected in a loop.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: December 15, 2009
    Assignee: Panasonic Corporation
    Inventors: Kazuhisa Raita, Ichiro Yamane, Yoshitaka Kitao, Toshifumi Hamaguchi, Takahiro Inauchi
  • Patent number: 7349880
    Abstract: A transaction information processing apparatus and the like for carrying out electronic business transactions of various products and services is provided. Equipped with a subscription information database (12) for storing a subscription total number or a subscription total amount, a bid information database (15) for storing a bid unit price and a bid number or a bid total amount, and successful bid processing section (21h) for carrying out a successful bid processing of a transaction item. This successful bid processing section (21h) includes a successful bid stock price determination section (21j) for determining the same successful bid price to all the successful bidders, and a successful bid stock number determination section (21k) for determining successful bid numbers to all the successful bidders. According to this apparatus, it is possible to determine objectively and rationally prices of products of which actual transaction volumes are small.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: March 25, 2008
    Assignee: SBI Securities Co., Ltd.
    Inventor: Yoshitaka Kitao
  • Publication number: 20080065920
    Abstract: A power supply unit is arranged between a CPU and a power supply device for supplying power to the CPU. Information necessary in proceeding with a program is evacuated from the CPU to an information holding unit. When a power shutdown factor is generated, a power supply control unit outputs a shutdown request signal to the CPU. The CPU, upon receiving the shutdown request signal, activates a power shutdown microprogram, evacuates the information necessary in proceeding with the program to the information holding unit, and outputs an evacuation completed signal to the power supply control unit after the evacuation is completed. Upon receiving the evacuation completed signal, the power supply control unit outputs a power shutdown control signal to the power supply unit. Upon receiving the power shutdown control signal from the power supply control unit, the power supply unit shuts down power supply to the CPU.
    Type: Application
    Filed: September 10, 2007
    Publication date: March 13, 2008
    Inventors: Yukari Suginaka, Toshifumi Hamaguchi, Yoshitaka Kitao, Shinya Muramatsu
  • Publication number: 20080061894
    Abstract: A differential amplifier circuit includes: a differential transistor pair composed of first and second transistors; a first resistance connected to a junction point of the first and second transistors at one terminal and to a first voltage node at the other terminal; second and third resistances provided between the first and second transistors, respectively, and a second voltage node; and first and second passive circuits respectively connected to the second and third resistances, the load characteristics of the passive circuits changing according to a control signal supplied. A ring oscillator is composed of a plurality of such differential amplifier circuits connected in a loop.
    Type: Application
    Filed: August 23, 2007
    Publication date: March 13, 2008
    Inventors: Kazuhisa Raita, Ichiro Yamane, Yoshitaka Kitao, Toshifumi Hamaguchi, Takahiro Inauchi
  • Patent number: 5136662
    Abstract: A local image processor is configured as a plurality of image processor elements each having a local image memory, and a single shift register circuit for supplying to the local image memories successive local images formed of an array of pixels of a source image. Each processor element includes a register holding a count value indicating the position within the source image of data that are currently being processed by that element, and the processor elements also include mutually interconnected registers whereby intermediate computation results obtained by one processor element can be utilized by another element during parallel processing operation.
    Type: Grant
    Filed: December 13, 1989
    Date of Patent: August 4, 1992
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masakatsu Maruyama, Shiro Sakiyama, Hiroyuki Nakahira, Yoshitaka Kitao, Toshiyuki Araki