Patents by Inventor Yoshitaka MURAMOTO

Yoshitaka MURAMOTO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and battery voltage monitoring device
    Patent number: 10630067
    Abstract: A semiconductor device is provided for measuring a voltage of each of plural unit cells series-coupled in multi-stage and configuring an assembled battery. The semiconductor device includes two terminals coupled to two nodes which are electrodes of a unit cell and coupled with other unit cells, and a voltage measurement circuit which measures the inter-terminal voltage between the two terminals. The device also includes a down-convert level shifter circuit which converts the inter-terminal voltage into a low-potential-side inter-terminal voltage based on a ground potential, and a comparator circuit which compares the converted low-potential-side inter-terminal voltage with a predetermined reference voltage.
    Type: Grant
    Filed: July 6, 2017
    Date of Patent: April 21, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yoshitaka Muramoto, Junko Kimura, Hirohiko Hayakawa
  • SEMICONDUCTOR DEVICE AND BATTERY VOLTAGE MONITORING DEVICE
    Publication number: 20170302069
    Abstract: A semiconductor device is provided for measuring a voltage of each of plural unit cells series-coupled in multi-stage and configuring an assembled battery. The semiconductor device includes two terminals coupled to two nodes which are electrodes of a unit cell and coupled with other unit cells, and a voltage measurement circuit which measures the inter-terminal voltage between the two terminals. The device also includes a down-convert level shifter circuit which converts the inter-terminal voltage into a low-potential-side inter-terminal voltage based on a ground potential, and a comparator circuit which compares the converted low-potential-side inter-terminal voltage with a predetermined reference voltage.
    Type: Application
    Filed: July 6, 2017
    Publication date: October 19, 2017
    Inventors: Yoshitaka MURAMOTO, Junko KIMURA, Hirohiko HAYAKAWA
  • Semiconductor device and battery voltage monitoring device
    Patent number: 9735567
    Abstract: A semiconductor device is provided for measuring a voltage of each of plural unit cells series-coupled in multi-stage and configuring an assembled battery. The semiconductor device includes two terminals coupled to two nodes which are electrodes of a unit cell and coupled with other unit cells, and a voltage measurement circuit which measures the inter-terminal voltage between the two terminals. The device also includes a down-convert level shifter circuit which converts the inter-terminal voltage into a low-potential-side inter-terminal voltage based on a ground potential, and a comparator circuit which compares the converted low-potential-side inter-terminal voltage with a predetermined reference voltage.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: August 15, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yoshitaka Muramoto, Junko Kimura, Hirohiko Hayakawa
  • SEMICONDUCTOR DEVICE AND BATTERY VOLTAGE MONITORING DEVICE
    Publication number: 20140055896
    Abstract: A semiconductor device is provided for measuring a voltage of each of plural unit cells series-coupled in multi-stage and configuring an assembled battery. The semiconductor device includes two terminals coupled to two nodes which are electrodes of a unit cell and coupled with other unit cells, and a voltage measurement circuit which measures the inter-terminal voltage between the two terminals. The device also includes a down-convert level shifter circuit which converts the inter-terminal voltage into a low-potential-side inter-terminal voltage based on a ground potential, and a comparator circuit which compares the converted low-potential-side inter-terminal voltage with a predetermined reference voltage.
    Type: Application
    Filed: August 16, 2013
    Publication date: February 27, 2014
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Yoshitaka MURAMOTO, Junko KIMURA, Hirohiko HAYAKAWA