Patents by Inventor Yoshitaka Sumida

Yoshitaka Sumida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6880096
    Abstract: Method and apparatus for reducing electrical power consumption of an electronic unit provided with a central processing unit (CPU). The CPU is returned to a normal operation state at regular intervals when the CPU has been placed in a sleep state. The CPU outputs a clear signal to a monitoring circuit, and makes reference to an actuation signal for an external device, such as, for example, a motor from a control switch to place the CPU in the sleep state at a time other than a time when reference is made to the clear signal and the input signal. When the CPU has been released from the sleep state, reference to an output of the clear signal and the input signal and an output of only the clear signal are repeated at regular intervals and at a predetermined frequency.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: April 12, 2005
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventor: Yoshitaka Sumida
  • Patent number: 6690582
    Abstract: In an electronic control unit mounting structure, electronic control units are mounted on a junction block, and printed circuit boards 4a and 4b of the electronic control units, each having a connector 41a, 41b of a through construction mounted thereon, are superposed in such a posture that these connectors 41a and 41b are disposed in registry with each other in an upward-downward direction, and connection terminals 31 of the junction block are inserted in the connectors 41a and 41b.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: February 10, 2004
    Assignees: Autonetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventor: Yoshitaka Sumida
  • Patent number: 6611931
    Abstract: Data in a RAM indicated by a top address is read, the read contents are written into the next address, and the operation is repeated to an end address, then the RAM value at the end address is compared with the RAM value at the top address. If the RAM values are the same, all the RAM is determined to be normal. The data comparison processing may include only one comparison with the end address data. Additionally, a ROM may be checked in a distributed manner in the wait time of main processing, rather than being checked in initial processing.
    Type: Grant
    Filed: November 13, 2000
    Date of Patent: August 26, 2003
    Assignees: Autonetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventor: Yoshitaka Sumida
  • Publication number: 20020078390
    Abstract: Method and apparatus for reducing electrical power consumption of an electronic unit provided with a central processing unit (CPU). The CPU is returned to a normal operation state at regular intervals when the CPU has been placed in a sleep state. The CPU outputs a clear signal to a monitoring circuit, and makes reference to an actuation signal for an external device, such as, for example, a motor from a control switch to place the CPU in the sleep state at a time other than a time when reference is made to the clear signal and the input signal. When the CPU has been released from the sleep state, reference to an output of the clear signal and the input signal and an output of only the clear signal are repeated at regular intervals and at a predetermined frequency.
    Type: Application
    Filed: December 4, 2001
    Publication date: June 20, 2002
    Applicant: SUMITOMO WIRING SYSTEMS, Ltd
    Inventor: Yoshitaka Sumida
  • Publication number: 20020022387
    Abstract: In an electronic control unit mounting structure, electronic control units are mounted on a junction block, and printed circuit boards 4a and 4b of the electronic control units, each having a connector 41a, 41b of a through construction mounted thereon, are superposed in such a posture that these connectors 41a and 41b are disposed in registry with each other in an upward-downward direction, and connection terminals 31 of the junction block are inserted in the connectors 41a and 41b.
    Type: Application
    Filed: July 26, 2001
    Publication date: February 21, 2002
    Applicant: Autonetworks Technologies, Ltd.
    Inventor: Yoshitaka Sumida
  • Patent number: 6184783
    Abstract: An electronic control unit for a car in which a control portion operates in accordance with signals given from a plurality of input portions including a car ignition switch to thereby perform drive control of a predetermined output portion, the control portion having a sleep function by which the control portion stops when the control portion in not required to operate, comprises a watchdog circuit for watching the operation of the control portion; and a conditioning circuit for defining a condition for starting the watchdog circuit; the conditioning circuit being constituted by an OR circuit for performing the logical sum OR among at least two signal inputs from the input portions and a signal input indicating the fact that the control portion is operating.
    Type: Grant
    Filed: August 26, 1998
    Date of Patent: February 6, 2001
    Assignees: Harness System Technologies Research, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventor: Yoshitaka Sumida
  • Patent number: 6175795
    Abstract: The invention provides an on-vehicle electronic control unit wherein all types of combinations of electrical equipment can be controlled by the electronic control unit with a common arrangement without changing the arrangement of the microcomputer, the print circuit board or the like, which makes it possible to reduce the number of parts of the on-vehicle electronic control unit to a large extent and reduce the cost thereof. The memory portion of a microcomputer of the electronic control unit stores the control programs for all types of electrical equipment to be controlled. Input terminals are opened and/or ground in accordance with the combination of electrical equipment to be controlled so that the microcomputer can recognize the type of the control program to read from the memory portion. In this manner, the electronic control unit is adapted to the change of the combination of the electrical equipment without changing the hardware arrangement.
    Type: Grant
    Filed: July 2, 1998
    Date of Patent: January 16, 2001
    Assignees: Harness System Technologies Research, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventor: Yoshitaka Sumida
  • Patent number: 5915994
    Abstract: A wiring structure comprises a connector and an electromagnetic relay mounted on a printed circuit board. Connector terminals extend respectively to lead terminals of the electromagnetic relay. Through holes formed respectively through distal end portions of the connector terminals and, are aligned respectively with through holes in the printed circuit board in an overlying manner, and each of the lead terminals of the electromagnetic relay is passed through the associated mating pair of aligned through holes, and is fixed thereto by soldering.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: June 29, 1999
    Assignees: Harness System Technologies Research, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventor: Yoshitaka Sumida
  • Patent number: 5585781
    Abstract: In a device for detecting the operative states of switches, a common switching device 17 is connected in series with input resistors 16, and currents flowing into switching circuits are cut off when it is judged based on the states of switches 10 to 15 that a vehicle is being parked. Further, a detector 19 is so set as to perform its detection only at specified intervals. The switching device 17 is turned on at the detection timing of the detector 19 and is, when the detector 19 performs no detection, turned off so as to prevent the currents from flowing into the respective switching circuits. With the above construction, the currents flowing into the switching circuits can perfectly be cut off while the vehicle is being parked, and the input resistors in use are less than in the prior art. Further, since the currents flow through the input resistors at specified intervals, an average power consumption of each input resistor can be reduced, enabling the use of input resistors having a low rated power.
    Type: Grant
    Filed: August 17, 1995
    Date of Patent: December 17, 1996
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventor: Yoshitaka Sumida
  • Patent number: 5568025
    Abstract: There is disclosed a device for detecting an abnormality in relays which is adapted such that if there is a current flow through a motor (M) when first and second transistors (Q1, Q2) are off resulting from an abnormality such as melting of first and second motor driving relays (RL1, RL2), a controller (1) turns on the transistors (Q1, Q2) of a motor driving portion (2) in response to a detection signal from a signal detecting portion (3) and accordingly provides the same potential across the motor (M) to stop the motor (M) without a conventionally complicated, costly construction.
    Type: Grant
    Filed: October 26, 1994
    Date of Patent: October 22, 1996
    Assignee: Sumitomo Wiring Systems, Ltd.
    Inventors: Yoshitaka Sumida, Shinichiro Takahashi