Patents by Inventor Yoshitaka USHIYAMA

Yoshitaka USHIYAMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190019827
    Abstract: A performance of a semiconductor device is improved. A method of manufacturing a semiconductor device according to one embodiment includes a step of mounting a cover member via a bonding material on an upper surface of a frame member fixed on a wiring substrate, and a step of curing the bonding material by irradiating the bonding material mounted on the frame member with an ultraviolet ray. The wiring substrate has a base member and an insulating film covering the base member, and the frame member and a semiconductor chip are mounted (fixed) onto an upper surface of the insulating film. The frame member contains glass fibers. Moreover, a roughness of the upper surface of the frame member is equal to or less than a roughness of the upper surface of the insulating film.
    Type: Application
    Filed: September 18, 2018
    Publication date: January 17, 2019
    Inventor: Yoshitaka USHIYAMA
  • Patent number: 10103188
    Abstract: A performance of a semiconductor device is improved. A method of manufacturing a semiconductor device according to one embodiment includes a step of mounting a cover member via a bonding material on an upper surface of a frame member fixed on a wiring substrate, and a step of curing the bonding material by irradiating the bonding material mounted on the frame member with an ultraviolet ray. The wiring substrate has a base member and an insulating film covering the base member, and the frame member and a semiconductor chip are mounted (fixed) onto an upper surface of the insulating film. The frame member contains glass fibers. Moreover, a roughness of the upper surface of the frame member is equal to or less than a roughness of the upper surface of the insulating film.
    Type: Grant
    Filed: July 25, 2017
    Date of Patent: October 16, 2018
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Yoshitaka Ushiyama
  • Publication number: 20180076245
    Abstract: A performance of a semiconductor device is improved. A method of manufacturing a semiconductor device according to one embodiment includes a step of mounting a cover member via a bonding material on an upper surface of a frame member fixed on a wiring substrate, and a step of curing the bonding material by irradiating the bonding material mounted on the frame member with an ultraviolet ray. The wiring substrate has a base member and an insulating film covering the base member, and the frame member and a semiconductor chip are mounted (fixed) onto an upper surface of the insulating film. The frame member contains glass fibers. Moreover, a roughness of the upper surface of the frame member is equal to or less than a roughness of the upper surface of the insulating film.
    Type: Application
    Filed: July 25, 2017
    Publication date: March 15, 2018
    Inventor: Yoshitaka USHIYAMA
  • Patent number: 9324663
    Abstract: A semiconductor device includes a semiconductor chip having a first main surface, a second main surface opposite to the first main surface, a side surface arranged between the first main surface and the second main surface, and a magnetic storage device, a first magnetic shield overlaying on the first main surface, a second magnetic shield overlaying on the second main surface, and a third magnetic shield overlaying on the side surface. The first and second magnetic shields are mechanically connected via the third magnetic shield.
    Type: Grant
    Filed: May 8, 2014
    Date of Patent: April 26, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Takahito Watanabe, Shintaro Yamamichi, Yoshitaka Ushiyama
  • Publication number: 20140239425
    Abstract: A semiconductor device includes a semiconductor chip having a first main surface, a second main surface opposite to the first main surface, a side surface arranged between the first main surface and the second main surface, and a magnetic storage device, a first magnetic shield overlaying on the first main surface, a second magnetic shield overlaying on the second main surface, and a third magnetic shield overlaying on the side surface. The first and second magnetic shields are mechanically connected via the third magnetic shield.
    Type: Application
    Filed: May 8, 2014
    Publication date: August 28, 2014
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: TAKAHITO WATANABE, SHINTARO YAMAMICHI, YOSHITAKA USHIYAMA
  • Patent number: 8749033
    Abstract: A semiconductor chip includes a magnetic storage device and includes an electrode pad on a first face. The semiconductor chip is coated with a magnetic shield layer in a state in which at least the electrode pad is exposed. The semiconductor chip is mounted on an interconnect substrate through a bump. At least one of the semiconductor chip and the interconnect substrate includes a convex portion, and the bump is disposed over the convex portion.
    Type: Grant
    Filed: October 5, 2011
    Date of Patent: June 10, 2014
    Assignee: Renesas Electronics Corporation
    Inventors: Takahito Watanabe, Shintaro Yamamichi, Yoshitaka Ushiyama
  • Publication number: 20120119338
    Abstract: A semiconductor chip includes a magnetic storage device and includes an electrode pad on a first face. The semiconductor chip is coated with a magnetic shield layer in a state in which at least the electrode pad is exposed. The semiconductor chip is mounted on an interconnect substrate through a bump. At least one of the semiconductor chip and the interconnect substrate includes a convex portion, and the bump is disposed over the convex portion.
    Type: Application
    Filed: October 5, 2011
    Publication date: May 17, 2012
    Applicant: RENESAS Electronics Corporation
    Inventors: Takahito Watanabe, Shintaro Yamamichi, Yoshitaka Ushiyama
  • Publication number: 20110057330
    Abstract: It is desired to provide an electronic device which can be easily taken out of a mold after a resin sealing processing. The electronic device include: an insulating layer; a wiring formed on the insulating layer; and a solder resist layer formed to cover the insulation layer and the wiring and including particles of an elastomer. An asperity is formed on a surface of the solder resist layer.
    Type: Application
    Filed: September 7, 2010
    Publication date: March 10, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Yoshitaka USHIYAMA
  • Publication number: 20110059304
    Abstract: A dry film includes a first solder resist film, a second solder resist film and a supporting film. The first solder resist film includes first particles of first elastomer. The supporting film supports the first solder resist film and the second solder resist film. Adhesion strength of a surface of the second solder resist film is weaker than adhesion strength of a surface of the first solder resist film at a glass transition point of the first elastomer. According to the dry film, it is possible to form a wiring board including a solder resist film which is arranged at a surface of the wiring board and hard to be adhered to a body such as a die upon heating.
    Type: Application
    Filed: September 3, 2010
    Publication date: March 10, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Yoshitaka USHIYAMA
  • Publication number: 20110057329
    Abstract: It is desired to provide an electronic device which can be easily taken out of a mold after resin sealing processing. The electronic device includes: an insulating layer; a wiring layer formed on a surface of the insulating layer; a first solder resist formed to cover the insulating layer and the wiring layer and including a particle of a first elastomer; and a second solder resist formed to cover a surface of the first solder resist. A surface of the second solder resist has smaller adhesive strength than the surface of the second solder resist at a glass transition point of the first elastomer.
    Type: Application
    Filed: September 7, 2010
    Publication date: March 10, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventor: Yoshitaka USHIYAMA