Patents by Inventor Yoshitake Nakaosa

Yoshitake Nakaosa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5353411
    Abstract: In an operating system generation method for a computer, at a system initiation, a kernel as the basic portion of the operating system is linked with a plurality of input-output drivers controlling input-output devices. A directory name of each driver and an address thereof in a main memory are stored in a table within the kernel with a correspondence established therebetween, which allows mutual references between the kernel and the input-output drivers and which hence enables the input-output drivers to be generated in an independent fashion with respect to the kernel. As a result, the user can incorporate desired input-output drivers into an operating system depending on a hardware configuration of the computer system.
    Type: Grant
    Filed: September 28, 1992
    Date of Patent: October 4, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Yoshitake Nakaosa, Megumu Kondo
  • Patent number: 5136709
    Abstract: In an operating system generation method of a computer, a symbolic name is converted into an identification code, which is further converted into an address. This enables an inter-reference operation to be achieved between a kernel and input/output device drivers, thereby independently generating the input/output device drivers and the kernel. As a result, depending on the hardware configuration of the user system, input/output device drivers can be incorporated into the operating system.
    Type: Grant
    Filed: December 7, 1988
    Date of Patent: August 4, 1992
    Assignees: Hitachi, Ltd., Hitachi Computer Engineering Co., Ltd.
    Inventors: Yoshihisa Shirakabe, Megumu Kondo, Yoshitake Nakaosa, Hidenori Yamada, Sadao Ohashi, Hideo Ohchi
  • Patent number: 4812975
    Abstract: A method for emulating programs in a system includes a plurality of first and second data processors having different instruction word sets. An instruction which interrupts the operating system on the first data processor is defined. When the instruction is detected in a program running on the first data processor, it is determined whether or not the instruction is an instruction associated with an input/output macro instruction. If it is found, as a result of the determination, that this is the case, an interrupt is caused in a program running on the second data processor which controls the emulation, and the input/output macro instruction output from an emulated program is translated into an input/output macro instuction for the operating system, thereby implementing an emulation with a minimized overhead.
    Type: Grant
    Filed: July 11, 1984
    Date of Patent: March 14, 1989
    Assignee: Hitachi, Ltd.
    Inventors: Shigemi Adachi, Yoshitake Nakaosa, Yoshiki Fujioka
  • Patent number: 4692896
    Abstract: A method of processing a plurality of different code systems for an information processing apparatus including an operating system, comprises a step of inputting a source program, and a compiling step of analyzing meaning of the source program to thereby create a series of instructions and data required for executing a processing equivalent to the meaning of the source program.
    Type: Grant
    Filed: July 8, 1985
    Date of Patent: September 8, 1987
    Assignee: Hitachi, Ltd.
    Inventors: Kousuke Sakoda, Masahiro Kainaga, Hidehiko Akita, Fumiya Murata, Yoshitake Nakaosa