Patents by Inventor Yoshiteru Nishida
Yoshiteru Nishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240030068Abstract: A processing method of a workpiece includes a protective film coating step of coating a front surface of a wafer with a protective film, and partly removing the protective film along planned dividing lines, a dividing step of supplying a first gas in a plasma state to divide the wafer into multiple chips along the planned dividing lines, a hydrophilization step of supplying a second gas in a plasma state to at least any of front surfaces and side surfaces of the chips, an exposed adhesive tape, and an annular frame that have been hydrophobized due to the dividing step to hydrophilize the at least any of the front surfaces and the side surfaces of the chips, the exposed adhesive tape, and the annular frame, and a cleaning step of removing the protective film and cleaning a frame unit by a cleaning liquid after the hydrophilization step.Type: ApplicationFiled: July 17, 2023Publication date: January 25, 2024Inventors: Hiroyuki TAKAHASHI, Yoshiteru NISHIDA, Susumu YOKOO
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Patent number: 11456213Abstract: There is provided a processing method of a wafer having a functional layer on a front surface side. The processing method includes a laser processing step of forming laser processed grooves along streets while removing the functional layer along the streets by executing irradiation with a laser beam and a cut groove forming step of forming cut grooves inside the laser processed grooves along the streets by cutting the wafer by a cutting blade. The processing method also includes a grinding step of causing the cut grooves to be exposed on a back surface side of the wafer and dividing the wafer into plural device chips by grinding the back surface side of the wafer and thinning the wafer and a processing distortion removal step of supplying a gas in a plasma state to the back surface side of the wafer and removing processing distortion.Type: GrantFiled: September 10, 2020Date of Patent: September 27, 2022Assignee: DISCO CORPORATIONInventors: Yoshiteru Nishida, Hidekazu Iida, Kenta Chito
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Publication number: 20220102215Abstract: A wafer processing method includes: a resin film coating step of coating an upper surface of a wafer with a water-soluble resin and coating a dicing tape exposed between the wafer and a frame with a water-soluble resin, and solidifying the water-soluble resin to form a resin film, a partial resin film removing step of removing the resin film from regions to be divided of the wafer to partially expose the upper surface of the wafer, an etching step of subjecting the regions to be divided of the wafer to plasma etching to divide the wafer into individual device chips, and a whole resin film removing step of cleaning a frame unit to remove wholly the resin film.Type: ApplicationFiled: September 14, 2021Publication date: March 31, 2022Inventors: Susumu YOKOO, Hiroyuki TAKAHASHI, Kentaro WADA, Yoshio WATANABE, Kenji OKAZAKI, Yoshiteru NISHIDA
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Patent number: 10957593Abstract: A method of processing a wafer includes a grinding step of grinding a wafer that has first insulating films covering via electrodes, from a reverse side thereof, an electrode protruding step of protruding the via electrodes covered with the first insulating films from the reverse side by way of etching, a distorted layer forming step of forming a distorted layer on the reverse side of the wafer, an insulating film forming step of forming a second insulating film on the reverse side of the wafer, and an electrode forming step of removing the first insulating films and the second insulating film from the regions where they overlap the via electrodes, and forming reverse-side electrodes connected to the via electrodes.Type: GrantFiled: December 2, 2019Date of Patent: March 23, 2021Assignee: DISCO CORPORATIONInventors: Yoshiteru Nishida, Hidekazu Iida, Kenta Chito, Youngsuk Kim
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Publication number: 20210082763Abstract: There is provided a processing method of a wafer having a functional layer on a front surface side. The processing method includes a laser processing step of forming laser processed grooves along streets while removing the functional layer along the streets by executing irradiation with a laser beam and a cut groove forming step of forming cut grooves inside the laser processed grooves along the streets by cutting the wafer by a cutting blade. The processing method also includes a grinding step of causing the cut grooves to be exposed on a back surface side of the wafer and dividing the wafer into plural device chips by grinding the back surface side of the wafer and thinning the wafer and a processing distortion removal step of supplying a gas in a plasma state to the back surface side of the wafer and removing processing distortion.Type: ApplicationFiled: September 10, 2020Publication date: March 18, 2021Inventors: Yoshiteru NISHIDA, Hidekazu IIDA, Kenta CHITO
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Patent number: 10896836Abstract: An electrostatic chuck is provided and has a holding surface for holding a wafer with a tape attached to one side of the wafer where the tape is in contact with the holding surface. The electrostatic chuck includes a disk-shaped member having a plurality of fine holes communicating with a vacuum source, where the fine holes are exposed to the holding surface. The disk-shaped member also includes a plurality of asperities formed on the holding surface and connected to the fine holes, and an electrode embedded in the disk-shaped member. The vacuum source is operated to produce a vacuum on the holding surface through the fine holes and thereby hold the wafer through the tape on the holding surface under suction, where the asperities formed on the holding surface function as a suction passage communicating with the fine holes.Type: GrantFiled: July 13, 2018Date of Patent: January 19, 2021Assignee: DISCO CORPORATIONInventors: Kenta Chito, Hidekazu Iida, Tomohiro Yamada, Yoshiteru Nishida, Hiroyuki Takahashi, Ryoko Fujiya, Susumu Yokoo
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Patent number: 10790193Abstract: A method for processing a wafer in which patterns including a metal layer are formed on streets. The method includes: a step of applying a laser beam along the streets formed with the patterns to form laser processed grooves having a depth in excess of a finished thickness of the wafer while removing the patterns; a step of grinding a back surface side of the wafer to thin the wafer to the finished thickness, and to expose the laser processed grooves to the back surface of the wafer, thereby dividing the wafer into a plurality of device chips; a step of removing a crushed layer formed on the back surface side of the wafer; and a step of forming a strain layer on the back surface side of the wafer by plasma processing using an inert gas.Type: GrantFiled: April 4, 2019Date of Patent: September 29, 2020Assignee: DISCO CorporationInventors: Yoshiteru Nishida, Hidekazu Iida, Susumu Yokoo, Hiroyuki Takahashi, Kenta Chito
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Patent number: 10790192Abstract: A method for processing a wafer in which patterns including a metal layer are formed on streets. The method includes: a step of applying a laser beam along the streets formed with the patterns to form laser processed grooves while removing the patterns; a step of forming cut grooves having a depth in excess of a finished thickness of the wafer, inside the laser processed grooves; a step of grinding the back surface side of the wafer to thin the wafer to the finished thickness and to expose the cut grooves to the back surface of the wafer, thereby dividing the wafer into a plurality of device chips; a step of removing a crushed layer formed on the back surface side of the wafer; and a step of forming a strain layer on the back surface side of the wafer by plasma processing using an inert gas.Type: GrantFiled: April 4, 2019Date of Patent: September 29, 2020Assignee: DISCO CORPORATIONInventors: Yoshiteru Nishida, Hidekazu Iida, Susumu Yokoo, Hiroyuki Takahashi, Kenta Chito
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Publication number: 20200176313Abstract: A method of processing a wafer includes a grinding step of grinding a wafer that has first insulating films covering via electrodes, from a reverse side thereof, an electrode protruding step of protruding the via electrodes covered with the first insulating films from the reverse side by way of etching, a distorted layer forming step of forming a distorted layer on the reverse side of the wafer, an insulating film forming step of forming a second insulating film on the reverse side of the wafer, and an electrode forming step of removing the first insulating films and the second insulating film from the regions where they overlap the via electrodes, and forming reverse-side electrodes connected to the via electrodes.Type: ApplicationFiled: December 2, 2019Publication date: June 4, 2020Inventors: Yoshiteru NISHIDA, Hidekazu IIDA, Kenta CHITO, Youngsuk KIM
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Publication number: 20190311952Abstract: A method for processing a wafer in which patterns including a metal layer are formed on streets. The method includes: a step of applying a laser beam along the streets formed with the patterns to form laser processed grooves having a depth in excess of a finished thickness of the wafer while removing the patterns; a step of grinding a back surface side of the wafer to thin the wafer to the finished thickness, and to expose the laser processed grooves to the back surface of the wafer, thereby dividing the wafer into a plurality of device chips; a step of removing a crushed layer formed on the back surface side of the wafer; and a step of forming a strain layer on the back surface side of the wafer by plasma processing using an inert gas.Type: ApplicationFiled: April 4, 2019Publication date: October 10, 2019Inventors: Yoshiteru NISHIDA, Hidekazu IIDA, Susumu YOKOO, Hiroyuki TAKAHASHI, Kenta CHITO
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Publication number: 20190311951Abstract: A method for processing a wafer in which patterns including a metal layer are formed on streets. The method includes: a step of applying a laser beam along the streets formed with the patterns to form laser processed grooves while removing the patterns; a step of forming cut grooves having a depth in excess of a finished thickness of the wafer, inside the laser processed grooves; a step of grinding the back surface side of the wafer to thin the wafer to the finished thickness and to expose the cut grooves to the back surface of the wafer, thereby dividing the wafer into a plurality of device chips; a step of removing a crushed layer formed on the back surface side of the wafer; and a step of forming a strain layer on the back surface side of the wafer by plasma processing using an inert gas.Type: ApplicationFiled: April 4, 2019Publication date: October 10, 2019Inventors: Yoshiteru NISHIDA, Hidekazu IIDA, Susumu YOKOO, Hiroyuki TAKAHASHI, Kenta CHITO
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Publication number: 20190019712Abstract: Disclosed herein is an electrostatic chuck having a holding surface for holding a wafer with a tape attached to one side of the wafer in the condition where the tape is in contact with the holding surface. The electrostatic chuck includes a disk-shaped member having a plurality of fine holes communicating with a vacuum source, the fine holes being exposed to the holding surface, a plurality of asperities formed on the holding surface and connected to the fine holes, and an electrode embedded in the disk-shaped member. When the vacuum source is operated to produce a vacuum on the holding surface through the fine holes and thereby hold the wafer through the tape on the holding surface under suction, the asperities formed on the holding surface function as a suction passage communicating with the fine holes.Type: ApplicationFiled: July 13, 2018Publication date: January 17, 2019Inventors: Kenta Chito, Hidekazu Iida, Tomohiro Yamada, Yoshiteru Nishida, Hiroyuki Takahashi, Ryoko Fujiya, Susumu Yokoo
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Patent number: 10177004Abstract: A method of processing a wafer includes a plasma etching step of supplying an etching gas in a plasma state to the wafer to remove processing strains, debris, or modified layers. The plasma etching step includes turning an etching gas into a plasma state outside of a vacuum chamber which houses the wafer therein and delivering the etching gas in the plasma state into the vacuum chamber through a supply nozzle connected to the vacuum chamber.Type: GrantFiled: March 15, 2018Date of Patent: January 8, 2019Assignee: Disco CorporationInventors: Yoshio Watanabe, Siry Milan, Kenji Okazaki, Hiroyuki Takahashi, Yoshiteru Nishida, Satoshi Kumazawa
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Patent number: 10115636Abstract: A workpiece has a plurality of low-dielectric-constant insulation films and a metallic pattern stacked on a surface of a semiconductor substrate. Devices are formed in a plurality of regions partitioned by streets formed in a grid pattern. Surfaces of the devices formed on the workpiece are covered with a surface protective member, leaving the streets exposed. A dispersion of abrasive grains in an etching liquid capable of dissolving the metallic pattern is blasted against the workpiece together with compressed gas so as to remove the low-dielectric-constant insulation films and the metallic pattern on the streets, thereby exposing the semiconductor substrate. The workpiece is divided with the semiconductor substrate exposed by the wet blasting step subjected to dry etching so as to divide the workpiece along the streets.Type: GrantFiled: August 7, 2015Date of Patent: October 30, 2018Assignee: Disco CorporationInventors: Yoshiteru Nishida, Tomotaka Tabuchi, Hiroyuki Takahashi, Susumu Yokoo, Kenji Okazaki
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Publication number: 20180269068Abstract: A method of processing a wafer includes a plasma etching step of supplying an etching gas in a plasma state to the wafer to remove processing strains, debris, or modified layers. The plasma etching step includes turning an etching gas into a plasma state outside of a vacuum chamber which houses the wafer therein and delivering the etching gas in the plasma state into the vacuum chamber through a supply nozzle connected to the vacuum chamber.Type: ApplicationFiled: March 15, 2018Publication date: September 20, 2018Inventors: Yoshio Watanabe, Siry Milan, Kenji Okazaki, Hiroyuki Takahashi, Yoshiteru Nishida, Satoshi Kumazawa
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Patent number: 9330976Abstract: A wafer processing method includes forming a resist film on the front side of a wafer in an area except division lines, plasma etching the wafer to form a groove on the front side of the wafer along each division line, the groove having a depth greater than a finished thickness, removing the resist film from the front side of the wafer by cleaning, and grinding the back side of the wafer to reduce the thickness of the wafer to the finished thickness, so that the groove is exposed to the back side of the wafer to thereby divide the wafer into individual device chips. In the resist film removing step, a chemical fluid is sprayed to the resist film formed on the front side of the wafer, thereby removing the resist film.Type: GrantFiled: August 4, 2015Date of Patent: May 3, 2016Assignee: Disco CorporationInventors: Susumu Yakoo, Hiroyuki Takahashi, Kenji Okazaki, Yoshiteru Nishida, Tomotaka Tabuchi
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Publication number: 20160042962Abstract: A workpiece has a plurality of low-dielectric-constant insulation films and a metallic pattern stacked on a surface of a semiconductor substrate. Devices are formed in a plurality of regions partitioned by streets formed in a grid pattern. Surfaces of the devices formed on the workpiece are covered with a surface protective member, leaving the streets exposed. A dispersion of abrasive grains in an etching liquid capable of dissolving the metallic pattern is blasted against the workpiece together with compressed gas so as to remove the low-dielectric-constant insulation films and the metallic pattern on the streets, thereby exposing the semiconductor substrate. The workpiece is divided with the semiconductor substrate exposed by the wet blasting step subjected to dry etching so as to divide the workpiece along the streets.Type: ApplicationFiled: August 7, 2015Publication date: February 11, 2016Inventors: Yoshiteru Nishida, Tomotaka Tabuchi, Hiroyuki Takahashi, Susumu Yokoo, Kenji Okazaki
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Publication number: 20160042996Abstract: A wafer processing method includes forming a resist film on the front side of a wafer in an area except division lines, plasma etching the wafer to form a groove on the front side of the wafer along each division line, the groove having a depth greater than a finished thickness, removing the resist film from the front side of the wafer by cleaning, and grinding the back side of the wafer to reduce the thickness of the wafer to the finished thickness, so that the groove is exposed to the back side of the wafer to thereby divide the wafer into individual device chips. In the resist film removing step, a chemical fluid is sprayed to the resist film formed on the front side of the wafer, thereby removing the resist film.Type: ApplicationFiled: August 4, 2015Publication date: February 11, 2016Inventors: Susumu Yakoo, Hiroyuki Takahashi, Kenji Okazaki, Yoshiteru Nishida, Tomotaka Tabuchi
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Publication number: 20120252212Abstract: A wafer processing method which includes a protective member attaching step of attaching a protective member to the front side of the wafer, a back grinding step of grinding the back side of the silicon (Si) substrate of the wafer so as not to expose electrodes to the back side of the silicon (Si) substrate, and an etching step of etching the back side of the silicon (Si) substrate by using an etching liquid to thereby expose the electrodes to the back side of the silicon (Si) substrate. The etching liquid includes a first etching liquid having a high etching rate to silicon (Si) and a second etching liquid capable of etching silicon (Si) and having a low etching rate to silicon dioxide (SiO2).Type: ApplicationFiled: March 29, 2012Publication date: October 4, 2012Applicant: DISCO CORPORATIONInventor: Yoshiteru Nishida