Patents by Inventor Yoshito Saito

Yoshito Saito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9183986
    Abstract: A laminated body is divided into a large grain region and a small grain region. The large grain region is located outside the small grain region, and a boundary surface between the regions is located inside the outer surface of the laminated body while surrounding a section in which internal electrodes are present in the laminated body. To obtain the laminated body, firing is carried out with a profile in which the average rate of increase from room to the maximum temperature is 40° C./second or more.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: November 10, 2015
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yosuke Hirata, Hideaki Tsuji, Nagato Omori, Hiroyuki Wada, Takashi Hiramatsu, Yoshito Saito
  • Publication number: 20150279568
    Abstract: A first outer electrode and first inner electrodes are supplied with an anode potential and a second outer electrode and second inner electrodes are supplied with a cathode potential when a monolithic ceramic capacitor is mounted and in use. The first outer electrode supplied with the anode potential has a thickness that is greater than a thickness of the second outer electrode supplied with the cathode potential.
    Type: Application
    Filed: March 25, 2015
    Publication date: October 1, 2015
    Inventors: Yoshito Saito, Satoshi Matsuno, Shinji Otani, Tomochika Miyazaki, Yasuhiro Nishisaka
  • Patent number: 9136058
    Abstract: A laminated ceramic capacitor including a laminated body having a plurality of stacked ceramic layers and internal electrodes located between the ceramic layers. The internal electrodes have a plurality of ceramic columnar members formed therein, which project into the internal electrodes from interfaces between the ceramic layers and the internal electrodes, but do not penetrate in the thickness direction of the internal electrodes.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: September 15, 2015
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hiroyuki Wada, Yosuke Hirata, Takashi Hiramatsu, Yoshito Saito, Hideaki Tsuji, Hiroyuki Ukai
  • Publication number: 20150187498
    Abstract: In a multilayer ceramic capacitor, an inner ceramic layer includes a perovskite-type compound containing Ba and Ti. A region within an electrically effective portion of the inner ceramic layers sandwiched between inner electrodes, which is near an area where inner and outer electrodes connect to each other, is subjected to a mapping analysis using EDS. ((L2?L3)/L1)×100?50 is satisfied, L1 denotes a total length of ceramic grain boundaries detected from a TEM transmission image, L2 denotes a total length of grain boundaries, detected from a mapping image and the TEM transmission image, where the rare earth element is present, and L3 denotes a total length of portions, detected from a mapping image and the TEM transmission image, in which the grain boundaries where the rare earth element is present and grain boundaries where at least one of Mn, Mg, and Si is present are overlapped.
    Type: Application
    Filed: November 14, 2014
    Publication date: July 2, 2015
    Inventors: Kazuhisa UCHIDA, Yoshito SAITO, Jun IKEDA
  • Publication number: 20150187497
    Abstract: In a monolithic ceramic capacitor, ceramic layers defining inner layers are mainly composed of a perovskite compound containing Ba and Ti. A portion of an electrically effective section in the ceramic layers near a connecting portion between the inner electrodes and an outer electrode undergoes mapping analysis by an energy-dispersive method. In regions of the resulting mapping image, the regions extending from the interfaces between the inner electrodes and a corresponding one of the ceramic layers to positions about ? of the thickness of the ceramic layer in the stacking direction, ((L2?L3)/L1)×100?50 is satisfied, where L1 represents the total length of grain boundaries, L2 represents the total length of grain boundaries where a rare-earth element is present, and L3 represents the total length of portions where the grain boundaries where the rare-earth element is present are overlapped with grain boundaries with a specific element present.
    Type: Application
    Filed: December 24, 2014
    Publication date: July 2, 2015
    Inventors: Yoshito SAITO, Jun IKEDA, Kazuhisa UCHIDA
  • Publication number: 20150077897
    Abstract: A multilayer ceramic electronic component that has a multilayer portion having an outer layer portion adjacent region including an area in contact with an outer layer portion that forms a thermal-shock absorbing portion that includes curved ceramic layers and inner electrode layers smoothly varying in thickness from point to point. A region to an inside of the thermal-shock absorbing portion forms a normal multilayer portion that includes ceramic layers with less curvature than the ceramic layers in the thermal-shock absorbing portion and inner electrode layers with less variation in thickness from point to point in a direction along a principal surface of the outer layer portion than the inner electrode layers in the thermal-shock absorbing portion.
    Type: Application
    Filed: November 21, 2014
    Publication date: March 19, 2015
    Inventors: Hiroyuki Wada, Yosuke Hirata, Takashi Hiramatsu, Yoshito Saito, Hideaki Tsuji, Hiroyuki Ukai
  • Publication number: 20140078641
    Abstract: A laminated body is divided into a large grain region and a small grain region. The large grain region is located outside the small grain region, and a boundary surface between the regions is located inside the outer surface of the laminated body while surrounding a section in which internal electrodes are present in the laminated body. To obtain the laminated body, firing is carried out with a profile in which the average rate of increase from room to the maximum temperature is 40° C./second or more.
    Type: Application
    Filed: August 1, 2013
    Publication date: March 20, 2014
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Yosuke Hirata, Hideaki Tsuji, Nagato Omori, Hiroyuki Wada, Takashi Hiramatsu, Yoshito Saito
  • Patent number: 8540832
    Abstract: Changes in states giving rise to electrode breakage and ball formation are made less likely during firing step for sintering the laminated body, and the improvement in DC bias characteristics is achieved in laminated ceramic electronic components with a laminated body which has internal electrodes, even when ceramic layers and the internal electrodes are reduced in thickness. The laminated body is divided into a large grain region in which the ceramic has a relatively large grain diameter and a small grain region in which the ceramic has a relatively small grain diameter. The large grain region is located outside the small grain region, and a boundary surface between the large grain region and the small grain region is located inside the outer surface of the laminated body while surrounding a section in which the internal electrodes are present in the laminated body.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: September 24, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yosuke Hirata, Hideaki Tsuji, Nagato Omori, Hiroyuki Wada, Takashi Hiramatsu, Yoshito Saito
  • Publication number: 20110110014
    Abstract: Changes in states giving rise to electrode breakage and ball formation are made less likely during firing step for sintering the laminated body, and the improvement in DC bias characteristics is achieved in laminated ceramic electronic components with a laminated body which has internal electrodes, even when ceramic layers and the internal electrodes are reduced in thickness. The laminated body is divided into a large grain region in which the ceramic has a relatively large grain diameter and a small grain region in which the ceramic has a relatively small grain diameter. The large grain region is located outside the small grain region, and a boundary surface between the large grain region and the small grain region is located inside the outer surface of the laminated body while surrounding a section in which the internal electrodes are present in the laminated body.
    Type: Application
    Filed: January 11, 2011
    Publication date: May 12, 2011
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Yosuke Hirata, Hideaki Tsuji, Nagato Omori, Hiroyuki Wada, Takashi Hiramatsu, Yoshito Saito