Abstract: Disclosed are a nonlinear distortion compensating receiver and nonlinear distortion compensation method, wherein nonlinear distortion is reduced with a simple circuit configuration. A correction (opposite characteristics) filter (104) has characteristics opposite that of the frequency characteristics of a direct sampling mixer (102) and corrects signals sampled by the direct sampling mixer (102). In the main path, a LPF (106) extracts a frequency band component of a desired signal from the corrected signal. In the replica path, a BPF (107) extracts the frequency band component of a blocker signal from the corrected signal. A cubing circuit (108) uses the frequency band component of the blocker signal to generate a replica signal for the nonlinear distortion. An adaptive filter (110) performs filter processing on the replica signal while updating the filter coefficients.

Abstract: A sampling circuit and a receiver have a high level of filter design flexibility and excellent image rejection characteristics. Signals with phases that differ by 90° are sampled using an IQ generating circuit and are weighted by each of multiple parallel-connected discrete-time circuits, and the result of addition by an output adding circuit is ultimately output. Alternatively, a configuration in which the multiple parallel-connected discrete-time circuits and the output adding circuit are cascade-connected is adopted, so that frequency characteristics having an attenuation pole to one side can be achieved and excellent image rejection characteristics can be obtained.

Abstract: Disclosed is a harmonic rejection mixer that makes it possible to suppress high-frequency response, while keeping the number of gm elements from increasing. In a harmonic rejection mixer that regulates the waveform of an output signal by mixing outputs of multiple mixers that are connected in parallel with the latter stage of multiple gm elements, some of the gm elements are shared by I phase and Q phase by using a control signal with a duty ratio of less than 50% to drive at least some of the mixers, and then using the period in which the I-phase mixers are inactive to activate the Q-phase mixers.

Abstract: Disclosed is a mixer able to simultaneously suppress self-mixing and low-order harmonic response in a charge sampling circuit. Specifically disclosed is a multiphase mixer provided with a transconductance amplifier (101) for converting a voltage signal into a current signal, an N number (where N is a natural number that is 2 or more) of first integrators (401, 402) which are connected in parallel to the subsequent stage of the transconductance amplifier (101), and a 2N number of mixers (102, 103, 104, 105) connected in parallel in pairs to the respective N number of first integrators (401, 402), wherein two mixers connected to the same first integrator of any of the N number of first integrators (401, 402) are controlled by driving signals comprised of pulse trains with the same frequency and phases differing by 180°.

Abstract: A second-order distortion correcting receiver and a second-order distortion correcting method, wherein second-order inter-modulation distortion can be cancelled with high precision and with a simple circuit configuration, without requiring a complicated adjustment step. A non-linear active element unit (110) performs non-linear processing on an input signal to output a differential output signal and common mode output signal. A common mode detection unit (120) extracts the common mode output signal. A weighting unit (130) weights the extracted common mode output signal and thereby generates a corrected signal. A corrected signal injection unit (140) injects the corrected signal into a differential output signal to output a corrected differential output signal. A DC detection unit (150) calculates the average DC component of the corrected differential output signal. A weight determining unit (160) uses the average DC component to determine the weighting coefficient used by the weighting unit (130).

Abstract: An object of the invention is to provide a multimode polar modulation device and a multimode radio communication method for making it possible to decrease the distortion compensation processing data capacity while maintaining the distortion compensation accuracy and also making it possible to efficiently store the distortion compensation processing data corresponding to a multimode modulation signal adaptively acquired in memory. At the distortion compensation coefficient calibration operation time of a polar modulation circuit 1901, a control section 1903 selects a modulation signal with a narrower dynamic range of amplitude signal than at the transmission operation time, an adaptive operation control section 1711 measures a spectrum in output of a power amplifier 1 for each predetermined output level, and a distortion compensation processing circuit 1701 finds optimum coefficient information.

Abstract: There are provided a sampling mixer, quadrature demodulator, and a wireless device capable of suppressing receiving sensitivity degradation caused by alias components or second-order distortion components. In the sampling mixer (101), a sampling switch (5) and another sampling switch (36) sample a reception signal based on a local signal with a predetermined frequency. A control signal generator (15) generates a control signal for controlling a filter operation. An in-phase mixer (2) and a reverse-phase mixer (3) perform, based on the control signal, filter processing on the sample signal obtained by the sampling switch (5). A delay controller (117) controls the phase difference between the local signal and the control signal according to a reception-desired frequency.

Abstract: Disclosed are a nonlinear distortion compensating receiver and nonlinear distortion compensation method, wherein nonlinear distortion is reduced with a simple circuit configuration. A correction (opposite characteristics) filter (104) has characteristics opposite that of the frequency characteristics of a direct sampling mixer (102) and corrects signals sampled by the direct sampling mixer (102). In the main path, a LPF (106) extracts a frequency band component of a desired signal from the corrected signal. In the replica path, a BPF (107) extracts the frequency band component of a blocker signal from the corrected signal. A cubing circuit (108) uses the frequency band component of the blocker signal to generate a replica signal for the nonlinear distortion. An adaptive filter (110) performs filter processing on the replica signal while updating the filter coefficients.

Abstract: Disclosed is a harmonic rejection mixer that makes it possible to suppress high-frequency response, while keeping the number of gm elements from increasing. In a harmonic rejection mixer that regulates the waveform of an output signal by mixing outputs of multiple mixers that are connected in parallel with the latter stage of multiple gm elements, some of the gm elements are shared by I phase and Q phase by using a control signal with a duty ratio of less than 50% to drive at least some of the mixers, and then using the period in which the I-phase mixers are inactive to activate the Q-phase mixers.

Abstract: Disclosed are a distortion-correcting receiver and a distortion correction method capable of precisely cancelling inter-modulation secondary distortion even when an input signal is markedly band-limited in a reception processing unit. In the distortion-correcting receiver (100), the reception processing unit (110) executes reception processing of the input signal and outputs a received signal. A replica signal generation unit (120) generates a replica signal of the inter-modulation distortion component of the input signal by use of the input signal. A correction signal generation unit (130) comprises a frequency property imparting unit (131) and a weighting unit (132), adjusts the frequency property and the gain of the replica signal, and generates a correction signal. A correction signal injection unit (140) adds the reverse-phase signal of the correction signal to the received signal to correct the received signal.

Abstract: A second-order distortion correcting receiver and a second-order distortion correcting method, wherein second-order inter-modulation distortion can be cancelled with high precision and with a simple circuit configuration, without requiring a complicated adjustment step. A non-linear active element unit (110) performs non-linear processing on an input signal to output a differential output signal and common mode output signal. A common mode detection unit (120) extracts the common mode output signal. A weighting unit (130) weights the extracted common mode output signal and thereby generates a corrected signal. A corrected signal injection unit (140) injects the corrected signal into a differential output signal to output a corrected differential output signal. A DC detection unit (150) calculates the average DC component of the corrected differential output signal. A weight determining unit (160) uses the average DC component to determine the weighting coefficient used by the weighting unit (130).

Abstract: A receiving apparatus includes an amplification section that amplifies a received signal and a frequency conversion section that converts a frequency of the received signal, from a radio frequency to a baseband, the baseband having a lower frequency than the radio frequency. A gain control section amplifies, by a predetermined gain, the signal that has been subjected to the frequency conversion to the baseband. A voltage calibration section performs calibration on an offset voltage generated in the signal subjected to frequency conversion to the baseband. A time constant control section sets a first time constant during a reception operation and sets a second time constant, which is reduced with respect to the first time constant, during the calibration.

Abstract: Disclosed is a mixer able to simultaneously suppress self-mixing and low-order harmonic response in a charge sampling circuit. Specifically disclosed is a multiphase mixer provided with a transconductance amplifier (101) for converting a voltage signal into a current signal, an N number (where N is a natural number that is 2 or more) of first integrators (401, 402) which are connected in parallel to the subsequent stage of the transconductance amplifier (101), and a 2N number of mixers (102, 103, 104, 105) connected in parallel in pairs to the respective N number of first integrators (401, 402), wherein two mixers connected to the same first integrator of any of the N number of first integrators (401, 402) are controlled by driving signals comprised of pulse trains with the same frequency and phases differing by 180°.

Abstract: An object of the invention is to provide a polar modulation transmitter that can perform adaptive distortion compensation processing without the need for a synchronization adjustment circuit for synchronizing an input baseband signal and an output signal of a power amplifier.

Abstract: Provided is a discrete filter capable of increasing degree of freedom of design including a DC gain. A sampling mixer (100) includes: a control signal generation unit (104) which generates a control signal including an SO signal; a Ch (6) which successively integrates reception signals sampled by an LO signal frequency as discrete signals; a plurality of Cr (7, 8) which successively integrate discrete signals at a timing based on the control signal; Cb (15) which alternately integrates the discrete signals successively integrated by the respective Cr (7, 8); and a gain control capacitance unit (110) which has gain control capacitors (44, 45, 46) connected in parallel to the respective Cr (7, 8) and integrating the discrete signal and a reset switch (47) for resetting the discrete signal of the gain control capacitors (44, 45, 46) integrated in the past, upon connection between one end of Cr (7) and Cb (15).

Abstract: Disclosed are a sampling circuit and a receiver that have a high level of filter design flexibility and excellent image rejection characteristics. Signals with phases that differ by 90° are sampled using an IQ generating circuit (101) and are weighted by each of multiple parallel-connected discrete-time circuits (102-1-102-n), and the result of addition by an output adding circuit (103) is ultimately output. Alternatively, a configuration in which the multiple parallel-connected discrete-time circuits (102-1-102-n) and the output adding circuit (103) are cascade-connected is adopted, so that frequency characteristics having an attenuation pole to one side can be achieved and excellent image rejection characteristics can be obtained.

Abstract: A master stage 101 comprises a differential circuit composed of transistors 1 and 2, a differential circuit composed of transistors 3 and 4, a differential circuit composed of transistors 5 and 6, a load circuit 7 (a first load circuit), a load circuit 8 (a second load circuit), and a current source transistor 9. The load circuit 7 (the first load circuit) is composed of an inductor 7A (a first inductor), an inductor 7B (a fifth inductor), and a capacity 7C (a first capacity). The inductor 7B and capacity 7C cooperates together in forming a parallel resonance circuit (a first LC parallel resonance circuit), while the parallel resonance circuit is connected in series to the inductor 7A.

Abstract: A distortion compensating circuit is provided in which, in the polar modulation system, while suppressing increase of compensation data and increase of the circuit scale, a modulated signal can be correctly expressed, or low-distortion characteristics of a power amplifier can be realized. Based on a steady characteristic compensating circuit 11 which stores an output signal amplitude and output phase characteristics with respect to a control voltage in a steady state, amplitude adjustment is executed on amplitude information r11(t) on which amplitude correction is performed, by a first amplitude information adjusting portion 13, whereby the output-response characteristics of an output signal amplitude of an amplifier with respect to a change of the control voltage can be improved.

Abstract: A reception apparatus capable of preventing saturation and sensitivity degradation of a receiver when base transceiver station transmit power control is performed and calibrating offset voltage without increasing the amount of current consumption. In this apparatus, a gain setting section (109) estimates reception field intensity of each time slot in the next frame based on information of the reception field intensity and transmit power information which is information of the transmit power of the base transceiver station and calculates a gain set value according to the estimated reception field intensity. A gain control circuit (110) extracts a maximum gain out of the gains set by the gain setting section (109), uses the maximum gain as a set gain for DC offset voltage calibration and performs gain control at the gain set value corresponding to each time slot. A voltage calibration circuit (111) performs the DC offset voltage calibration of the received signal.

Abstract: There are provided a sampling mixer, quadrature demodulator, and a wireless device capable of suppressing receiving sensitivity degradation caused by alias components or second-order distortion components. In the sampling mixer (101), a sampling switch (5) and another sampling switch (36) sample a reception signal based on a local signal with a predetermined frequency. A control signal generator (15) generates a control signal for controlling a filter operation. An in-phase mixer (2) and a reverse-phase mixer (3) perform, based on the control signal, filter processing on the sample signal obtained by the sampling switch (5). A delay controller (117) controls the phase difference between the local signal and the control signal according to a reception-desired frequency.