Patents by Inventor Yoshito Ueoka

Yoshito Ueoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6468893
    Abstract: A method of forming solder bumps comprises the steps of (a), forming first solder paste layers on respective electrodes/pads of a substrate by printing a solder paste on the electrodes/pads using a first mask, (b) forming first solder bumps on the respective electrodes/pads by melting the first solder paste layers and solidifying the first solder paste layers, after removing the first mask, (c) forming second solder paste layers on the respective first solder bumps by printing a solder paste on the first solder bumps using a second mask and (d) forming second solder bumps on the respective electrodes/pads by melting the first solder bumps and the second solder paste layers to be integrated together and by solidifying the first solder bumps and the second solder paste layers, after removing the second mask.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: October 22, 2002
    Assignee: NEC Corporation
    Inventor: Yoshito Ueoka
  • Publication number: 20020064933
    Abstract: A method of forming solder bumps comprises the steps of (a), forming first solder paste layers on respective electrodes/pads of a substrate by printing a solder paste on the electrodes/pads using a first mask, (b) forming first solder bumps on the respective electrodes/pads by melting the first solder paste layers and solidifying the first solder paste layers, after removing the first mask, (c) forming second solder paste layers on the respective first solder bumps by printing a solder paste on the first solder bumps using a second mask and (d) forming second solder bumps on the respective electrodes/pads by melting the first solder bumps and the second solder paste layers to be integrated together and by solidifying the first solder bumps and the second solder paste layers, after removing the second mask.
    Type: Application
    Filed: October 23, 2001
    Publication date: May 30, 2002
    Inventor: Yoshito Ueoka
  • Patent number: 6176008
    Abstract: A jig for mounting fine metal balls to a semiconductor chip substrate or a circuit board is disclosed. A tray storing the metal balls is accommodated in a frame and constantly biased upward by springs. Head stops are provided on the frame such that when a suction head mates with the tray for sucking the metal balls, the tray stops at a position slightly sunken into the frame. A clearance is formed between the tray and the frame in the horizontal direction in order to absorb errors in dimensional accuracy when the tray and head are positioned by positioning pins.
    Type: Grant
    Filed: December 23, 1998
    Date of Patent: January 23, 2001
    Assignee: NEC Corporation
    Inventor: Yoshito Ueoka