Patents by Inventor Yoshitomo ONITSUKA

Yoshitomo ONITSUKA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230007777
    Abstract: An electronic component housing package includes an insulating substrate including a first surface with a mounting region mounting an electronic component, a second surface located opposite to the first surface, a plurality of side surfaces located between the first surface and the second surface, and a corner portion located between two of the side surfaces; an external connection conductor located on the second surface; and a corner conductor connected to the external connection conductor. The corner conductor is located from the external connection conductor toward the corner portion in a manner to increase the distance from the second surface.
    Type: Application
    Filed: November 16, 2020
    Publication date: January 5, 2023
    Applicant: KYOCERA Corporation
    Inventors: Yoshitomo ONITSUKA, Keisuke SAWADA
  • Publication number: 20220199499
    Abstract: A package for housing an electronic component includes: a base portion including a first surface including a recessed portion in which an electronic component is mounted and also including a second surface located on an opposite side to the first surface; an external connection conductor located on the second surface; internal wiring located inside the base portion; first wiring located on the second surface and connected to the internal wiring; and second wiring located between the first wiring and the external connection conductor and connected to the external connection conductor, in which the first wiring and the second wiring are covered with an insulating layer.
    Type: Application
    Filed: April 22, 2020
    Publication date: June 23, 2022
    Applicant: KYOCERA Corporation
    Inventors: Yoshitomo ONITSUKA, Tomoyuki IWATA
  • Patent number: 11264967
    Abstract: A multi-piece wiring substrate includes a matrix substrate including first and second insulating layers, and interconnection substrate regions arranged in a matrix. The matrix substrate includes dividing grooves opposing each other and disposed along boundaries between the interconnection substrate regions, and through-holes penetrating the matrix substrate in a thickness direction at positions where the dividing grooves are disposed. The inner surface conductor gradually decreases in thickness from a thick portion in a middle of the inner surface conductor, to thin portions disposed on a side of a boundary between the first and second insulating layers and on a first main surface side, and includes inclination portions each of which gradually increases in thickness from a boundary between corresponding one of the dividing grooves and the inner surface conductor to an inner surface of the inner surface conductor, in vertical sectional view.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: March 1, 2022
    Assignee: KYOCERA CORPORATION
    Inventor: Yoshitomo Onitsuka
  • Patent number: 10991671
    Abstract: A multi-piece wiring substrate includes a matrix substrate including a first main surface, a second main surface opposite to the first main surface, a third main surface disposed between the first main surface and the second main surface, an arrangement of a plurality of wiring substrate regions, a margin region surrounding the plurality of wiring substrate regions, and a dividing groove. The multi-piece wiring substrate further includes a through-hole disposed across the boundary between the wiring substrate regions or the boundary between the wiring substrate regions and the margin region, and which penetrates from the first main surface to the second main surface, and an external connection conductor at each corner of the wiring substrate regions on the second main surface. An auxiliary conductor is disposed around the through-hole on the third main surface.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: April 27, 2021
    Assignee: Kyocera Corporation
    Inventor: Yoshitomo Onitsuka
  • Patent number: 10945338
    Abstract: A wiring substrate includes a substrate with a first principal face and a second principal face. The first principal face has a first corner and first and second sides. The second principal face has a second corner corresponding to the first corner, and a third and a fourth side, respectively corresponding to the first and second sides. The substrate further comprising a first side surface connected to the first side, a second side surface connected to the second side, a third side surface connected to the third side, a fourth side surface connected to the fourth side, a first fracture part located between the first and third side surfaces to connect them, and a second fracture part located between the second and the fourth side surfaces to connect them. In the substrate's thickness direction, the length of the second side surface is smaller than the first side surface.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: March 9, 2021
    Assignee: Kyocera Corporation
    Inventor: Yoshitomo Onitsuka
  • Publication number: 20200287517
    Abstract: A multi-piece wiring substrate includes a matrix substrate including first and second insulating layers, and interconnection substrate regions arranged in a matrix. The matrix substrate includes dividing grooves opposing each other and disposed along boundaries between the interconnection substrate regions, and through-holes penetrating the matrix substrate in a thickness direction at positions where the dividing grooves are disposed. The inner surface conductor gradually decreases in thickness from a thick portion in a middle of the inner surface conductor, to thin portions disposed on a side of a boundary between the first and second insulating layers and on a first main surface side, and includes inclination portions each of which gradually increases in thickness from a boundary between corresponding one of the dividing grooves and the inner surface conductor to an inner surface of the inner surface conductor, in vertical sectional view.
    Type: Application
    Filed: September 26, 2018
    Publication date: September 10, 2020
    Applicant: KYOCERA Corporation
    Inventor: Yoshitomo ONITSUKA
  • Publication number: 20200168577
    Abstract: A multi-piece wiring substrate includes a matrix substrate including a first main surface, a second main surface opposite to the first main surface, a third main surface disposed between the first main surface and the second main surface, an arrangement of a plurality of wiring substrate regions, a margin region surrounding the plurality of wiring substrate regions, and a dividing groove. The multi-piece wiring substrate further includes a through-hole disposed across the boundary between the wiring substrate regions or the boundary between the wiring substrate regions and the margin region, and which penetrates from the first main surface to the second main surface, and an external connection conductor at each corner of the wiring substrate regions on the second main surface. An auxiliary conductor is disposed around the through-hole on the third main surface.
    Type: Application
    Filed: May 22, 2018
    Publication date: May 28, 2020
    Applicant: KYOCERA Corporation
    Inventor: Yoshitomo ONITSUKA
  • Publication number: 20200107448
    Abstract: A wiring substrate includes a substrate with a first principal face and a second principal face. The first principal face has a first corner and first and second sides. The second principal face has a second corner corresponding to the first corner, and a third and a fourth side, respectively corresponding to the first and second sides. The substrate further comprising a first side surface connected to the first side, a second side surface connected to the second side, a third side surface connected to the third side, a fourth side surface connected to the fourth side, a first fracture part located between the first and third side surfaces to connect them, and a second fracture part located between the second and the fourth side surfaces to connect them. In the substrate's thickness direction, the length of the second side surface is smaller than the first side surface.
    Type: Application
    Filed: December 2, 2019
    Publication date: April 2, 2020
    Applicant: Kyocera Corporation
    Inventor: Yoshitomo ONITSUKA
  • Patent number: 10499510
    Abstract: A multi-piece wiring substrate includes a matrix substrate provided with dividing grooves arranged along boundaries of wiring substrate regions in a first principal face and a second principal face, the dividing grooves including first dividing grooves, second dividing grooves, third dividing grooves, and fourth dividing grooves, depths of the first dividing grooves and depths of the second dividing grooves being set to be greater than depths of the third dividing grooves and depths of the fourth dividing grooves, first curved parts being provided so that the depths of the third dividing grooves gradually increase as going toward respective corners of the wiring substrate regions, and second curved parts being provided so that the depths of the fourth dividing grooves gradually increase as going toward the respective corners of the wiring substrate regions.
    Type: Grant
    Filed: April 20, 2017
    Date of Patent: December 3, 2019
    Assignee: KYOCERA CORPORATION
    Inventor: Yoshitomo Onitsuka
  • Patent number: 10182508
    Abstract: An electronic component housing package includes an insulating substrate having an upper surface including a mount for an electronic component, a frame-shaped metallized layer surrounding the mount on the upper surface of the insulating substrate, and a metal frame joined to the frame-shaped metallized layer with a brazing material. The frame-shaped metallized layer includes a first sloping portion sloping inwardly from an upper surface to an inner peripheral surface. The brazing material includes a fillet portion formed between an upper outer periphery of the frame-shaped metallized layer and the metal frame, and a filling portion formed between the first sloping portion and the metal frame.
    Type: Grant
    Filed: November 25, 2015
    Date of Patent: January 15, 2019
    Assignee: KYOCERA CORPORATION
    Inventors: Yoshitomo Onitsuka, Shuichi Kawasaki
  • Publication number: 20180324953
    Abstract: A multi-piece wiring substrate includes a matrix substrate provided with dividing grooves arranged along boundaries of wiring substrate regions in a first principal face and a second principal face, the dividing grooves including first dividing grooves, second dividing grooves, third dividing grooves, and fourth dividing grooves, depths of the first dividing grooves and depths of the second dividing grooves being set to be greater than depths of the third dividing grooves and depths of the fourth dividing grooves, first curved parts being provided so that the depths of the third dividing grooves gradually increase as going toward respective corners of the wiring substrate regions, and second curved parts being provided so that the depths of the fourth dividing grooves gradually increase as going toward the respective corners of the wiring substrate regions.
    Type: Application
    Filed: April 20, 2017
    Publication date: November 8, 2018
    Applicant: KYOCERA Corporation
    Inventor: Yoshitomo ONITSUKA
  • Publication number: 20180324969
    Abstract: An electronic component housing package includes an insulating substrate having an upper surface including a mount for an electronic component, a frame-shaped metallized layer surrounding the mount on the upper surface of the insulating substrate, and a metal frame joined to the frame-shaped metallized layer with a brazing material. The frame-shaped metallized layer includes a first sloping portion sloping inwardly from an upper surface to an inner peripheral surface. The brazing material includes a fillet portion formed between an upper outer periphery of the frame-shaped metallized layer and the metal frame, and a filling portion formed between the first sloping portion and the metal frame.
    Type: Application
    Filed: November 25, 2015
    Publication date: November 8, 2018
    Applicant: KYOCERA Corporation
    Inventors: Yoshitomo ONITSUKA, Shuichi KAWASAKI