Patents by Inventor Yoshitomo Sagae
Yoshitomo Sagae has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9142565Abstract: A semiconductor device includes a SOI substrate including a silicon substrate, an oxide layer on the silicon substrate, and a silicon layer on the oxide layer; a source region and a drain region formed in the silicon layer; and an acceptor-doped layer formed between the oxide layer and the silicon substrate, the acceptor-doped layer being doped with acceptors.Type: GrantFiled: June 11, 2013Date of Patent: September 22, 2015Assignee: Kabushiki Kaisha ToshibaInventors: Yoshitomo Sagae, Fumio Sasaki, Ryoichi Ohara
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Patent number: 8923781Abstract: According to one embodiment, a semiconductor switch includes a voltage generator, a voltage controller, a driver, and a switch unit. The voltage generator generates a negative first potential. The voltage controller controls the first potential according to a terminal switch signal input from an outside. The driver is input the terminal switch signal, and outputs at least one selected from the first potential and the second potential based on the terminal switch signal. The second potential is a power supply voltage or is higher than the power supply voltage. The switch unit is provided on an SOT substrate, switches a connection between an antenna terminal and any one of high frequency terminals based on the output of the driver.Type: GrantFiled: November 23, 2010Date of Patent: December 30, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Yugo Kunishi, Toshiki Seshita, Yoshitomo Sagae, Mitsuru Sugawara
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Patent number: 8698574Abstract: According to one embodiment, a high-frequency switch includes a high-frequency switch IC chip. The high-frequency switch IC chip has a high-frequency switching circuit section including an input terminal, a plurality of switching elements, a plurality of high-frequency signal lines, and a plurality of output terminals. The input terminal is connected to each of the plurality of output terminals via each of the plurality of switching elements with the high-frequency signal lines having the same lengths. The plurality of output terminals are arranged on a surface at an outer periphery of the high-frequency switch IC chip. The input terminal is arranged on the surface of the high-frequency switch IC chip at the center of the high-frequency switch IC circuit section.Type: GrantFiled: March 14, 2011Date of Patent: April 15, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Masayuki Sugiura, Noriyasu Kurihara, Toshiki Seshita, Hirotsugu Wakimoto, Yoshitomo Sagae, Toshiyuki Shimizu, Yoshio Itagaki, Masanori Ochi
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Publication number: 20130270640Abstract: A semiconductor device includes a SOI substrate including a silicon substrate, an oxide layer on the silicon substrate, and a silicon layer on the oxide layer; a source region and a drain region formed in the silicon layer; and an acceptor-doped layer formed between the oxide layer and the silicon substrate, the acceptor-doped layer being doped with acceptors.Type: ApplicationFiled: June 11, 2013Publication date: October 17, 2013Inventors: Yoshitomo SAGAE, Fumio SASAKI, Ryoichi OHARA
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Patent number: 8232827Abstract: A semiconductor switch includes: a first terminal; a second terminal; a switch section including a through FET connected between the first terminal and the second terminal and a shunt FET connected between the second terminal and a first ground terminal; a first control terminal configured to drive the through FET; a second control terminal configured to drive the shunt FET; and a driver provided on a substrate together with the switch section and configured to provide a differential output to the first control terminal and the second control terminal.Type: GrantFiled: March 18, 2010Date of Patent: July 31, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Yoshitomo Sagae, Toshiki Seshita
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Publication number: 20120146176Abstract: A semiconductor device receiving as input a radio frequency signal having a frequency of 500 MHz or more and a power of 20 dBm or more is provided. The semiconductor device includes: a silicon substrate; a silicon oxide film formed on the silicon substrate; a radio frequency interconnect provided on the silicon oxide film and passing the radio frequency signal; a fixed potential interconnect provided on the silicon oxide film and placed at a fixed potential; and an acceptor-doped layer. The acceptor-doped layer is formed in a region of the silicon substrate. The region is in contact with the silicon oxide film. The acceptor-doped layer is doped with acceptors.Type: ApplicationFiled: February 17, 2012Publication date: June 14, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yoshitomo Sagae, Fumio Sasaki, Ryoichi Ohara
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Patent number: 8134224Abstract: A semiconductor device receiving as input a radio frequency signal having a frequency of 500 MHz or more and a power of 20 dBm or more is provided. The semiconductor device includes: a silicon substrate; a silicon oxide film formed on the silicon substrate; a radio frequency interconnect provided on the silicon oxide film and passing the radio frequency signal; a fixed potential interconnect provided on the silicon oxide film and placed at a fixed potential; and an acceptor-doped layer. The acceptor-doped layer is formed in a region of the silicon substrate. The region is in contact with the silicon oxide film. The acceptor-doped layer is doped with acceptors.Type: GrantFiled: March 11, 2008Date of Patent: March 13, 2012Assignee: Kabushiki Kaisha ToshibaInventors: Yoshitomo Sagae, Fumio Sasaki, Ryoichi Ohara
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Publication number: 20120038411Abstract: According to one embodiment, a high-frequency switch includes a high-frequency switch IC chip. The high-frequency switch IC chip has a high-frequency switching circuit section including an input terminal, a plurality of switching elements, a plurality of high-frequency signal lines, and a plurality of output terminals. The input terminal is connected to each of the plurality of output terminals via each of the plurality of switching elements with the high-frequency signal lines having the same lengths. The plurality of output terminals are arranged on a surface at an outer periphery of the high-frequency switch IC chip. The input terminal is arranged on the surface of the high-frequency switch IC chip at the center of the high-frequency switch IC circuit section.Type: ApplicationFiled: March 14, 2011Publication date: February 16, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Masayuki Sugiura, Noriyasu Kurihara, Toshiki Seshita, Hirotsugu Wakimoto, Yoshitomo Sagae, Toshiyuki Shimizu, Yoshio Itagaki, Masanori Ochi
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Publication number: 20110159822Abstract: According to one embodiment, a semiconductor switch includes a voltage generator, a voltage controller, a driver, and a switch unit. The voltage generator generates a negative first potential. The voltage controller controls the first potential according to a terminal switch signal input from an outside. The driver is input the terminal switch signal, and outputs at least one selected from the first potential and the second potential based on the terminal switch signal. The second potential is a power supply voltage or is higher than the power supply voltage. The switch unit is provided on an SOT substrate, switches a connection between an anntena terminal and any one of high frequency terminals based on the output of the driver.Type: ApplicationFiled: November 23, 2010Publication date: June 30, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yugo Kunishi, Toshiki Seshita, Yoshitomo Sagae, Mitsuru Sugawara
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Publication number: 20110050288Abstract: A semiconductor switch includes: a first terminal; a second terminal; a switch section including a through FET connected between the first terminal and the second terminal and a shunt FET connected between the second terminal and a first ground terminal; a first control terminal configured to drive the through FET; a second control terminal configured to drive the shunt FET; and a driver provided on a substrate together with the switch section and configured to provide a differential output to the first control terminal and the second control terminal.Type: ApplicationFiled: March 18, 2010Publication date: March 3, 2011Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yoshitomo Sagae, Toshiki Seshita
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Publication number: 20090181630Abstract: A radio frequency switch circuit includes: an antenna terminal; a first and second RF terminal; a first through transistor placed between the antenna terminal and the first RF terminal; a second through transistor placed between the antenna terminal and the second RF terminal; a first shunt transistor placed between ground and the first RF terminal; a second shunt transistor placed between the ground and the second RF terminal; and a distortion compensation circuit including a reverse parallel connected MOS capacitor whose capacitance around 0 volts has voltage dependence that is convex to the minus direction, the distortion compensation circuit being operable to compensate for voltage dependence of off-capacitance around 0 volts of the first and second through transistor and the first and second shunt transistor that is convex to the plus direction. Electrical connection between the antenna terminal and the first and second RF terminal is switchable.Type: ApplicationFiled: January 15, 2009Publication date: July 16, 2009Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Toshiki Seshita, Yoshitomo Sagae
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Patent number: 7468543Abstract: A semiconductor device comprises a semiconductor switching element having a first electrode, a second electrode and a third electrode, and permitting a high-frequency signal to pass through between the first electrode and the second electrode, depending upon the potential of the third electrode, bias voltages at the first and second electrodes being substantially equal; and an inductor element and a capacitor element which are connected in parallel with respect to the semiconductor switching element at the first and second electrodes and are connected in series to each other.Type: GrantFiled: September 17, 2004Date of Patent: December 23, 2008Assignee: Kabushiki Kaisha ToshibaInventors: Yoshitomo Sagae, Toshiki Seshita
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Publication number: 20080224253Abstract: A semiconductor device receiving as input a radio frequency signal having a frequency of 500 MHz or more and a power of 20 dBm or more is provided. The semiconductor device includes: a silicon substrate; a silicon oxide film formed on the silicon substrate; a radio frequency interconnect provided on the silicon oxide film and passing the radio frequency signal; a fixed potential interconnect provided on the silicon oxide film and placed at a fixed potential; and an acceptor-doped layer. The acceptor-doped layer is formed in a region of the silicon substrate. The region is in contact with the silicon oxide film. The acceptor-doped layer is doped with acceptors.Type: ApplicationFiled: March 11, 2008Publication date: September 18, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yoshitomo SAGAE, Fumio Sasaki, Ryoichi Ohara
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Publication number: 20080064358Abstract: A semiconductor device includes: an SOI substrate with a silicon oxide layer 123 formed on a silicon substrate 122 and a semiconductor layer formed thereon; and a MOSFET formed within the semiconductor layer, wherein a region of the silicon substrate 122 through the silicon oxide layer 123 is removed by etching, which corresponds to a region of the semiconductor layer where the MOSFET is formed.Type: ApplicationFiled: September 11, 2007Publication date: March 13, 2008Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Yoshitomo Sagae, Fumio Sasaki
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Patent number: 7157749Abstract: A bipolar transistor is provided which includes a GaAs substrate, an n-type collector region formed on the GaAs substrate, a p-type base region formed on the n-type collector region and having a p-type base layer of SiGe having a composition lattice-matched with the GaAs substrate, and an n-type emitter region formed on the p-type base region. A bipolar transistor may include a GaAs substrate, a collector region of a first conductivity type formed on the GaAs substrate and including a collector contact layer of the first conductivity type SiGe, which has a composition lattice-matched with the GaAs substrate, a base region of a second conductivity type formed on the collector region of the first conductivity type, and an emitter region of the first conductivity type formed on the base region of the second conductivity type.Type: GrantFiled: February 9, 2005Date of Patent: January 2, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Hidetoshi Fujimoto, Tetsuro Nozu, Yoshitomo Sagae, Akira Yoshioka
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Patent number: 7148737Abstract: The invention discloses a semiconductor switching circuit suitable for a Single Pole n Throw (SPnT) switching circuit having: a common terminal; first through third terminals, ground and control terminals, through FETS, shunt FETs, wherein when a first electric potential is supplied only to a Jth control terminal, and a second lower electric potential is supplied to the other control terminals, the common and Jth terminals are electrically connected and the first through third terminals are electrically disconnected.Type: GrantFiled: June 2, 2005Date of Patent: December 12, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Toshiki Seshita, Yoshitomo Sagae
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Publication number: 20060082408Abstract: According to the present invention, there is provided a semiconductor switching circuit having: a common terminal; first, second, and third terminals; first, second, and third ground terminals; first, second, and third control terminals; a first through FET having a source and drain connected in series between the common terminal and first terminal, and a gate connected to the first control terminal via a first resistor; a second through FET having a source and drain connected in series between the common terminal and second terminal, and a gate connected to the second control terminal via a second resistor; a third through FET having a source and drain connected in series between the common terminal and third terminal, and a gate connected to the third control terminal via a third resistor; 11th and 12th shunt FETs each having a source and drain connected in parallel between the first terminal and first ground terminal; 21st and 22nd shunt FETs each having a source and drain connected in parallel between theType: ApplicationFiled: June 2, 2005Publication date: April 20, 2006Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Toshiki Seshita, Yoshitomo Sagae
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Publication number: 20050239415Abstract: A high-frequency switch circuit includes a first terminal which receives a transmission signal, a first FET which makes a path of the transmission signal conductive or cut off, a second terminal which receives a control signal that is inactive in a transmitting mode and is active in a receiving mode, a ground terminal which is grounded via a first capacitor, and a second FET which has a drain electrode, a source electrode and a gate electrode, the drain or source electrode being connected to the ground terminal, the source or drain electrode being connected to first terminal, and the gate electrode being connected to the second terminal, and which has a greater off-capacitance for unit gate width than the first FET.Type: ApplicationFiled: July 6, 2004Publication date: October 27, 2005Inventors: Yoshitomo Sagae, Toshiki Seshita
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Publication number: 20050189565Abstract: A bipolar transistor is provided which includes a GaAs substrate, an n-type collector region formed on the GaAs substrate, a p-type base region formed on the n-type collector region and having a p-type base layer of SiGe having a composition lattice-matched with the GaAs substrate, and an n-type emitter region formed on the p-type base region. A bipolar transistor may include a GaAs substrate, a collector region of a first conductivity type formed on the GaAs substrate and including a collector contact layer of the first conductivity type SiGe, which has a composition lattice-matched with the GaAs substrate, a base region of a second conductivity type formed on the collector region of the first conductivity type, and an emitter region of the first conductivity type formed on the base region of the second conductivity type.Type: ApplicationFiled: February 9, 2005Publication date: September 1, 2005Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Hidetoshi Fujimoto, Tetsuro Nozu, Yoshitomo Sagae, Akira Yoshioka
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Publication number: 20050190691Abstract: A high-frequency switch apparatus includes a switch circuit, a terminal and a logical inversion circuit. The switch circuit includes a first FET which has a first threshold voltage and makes a path of a transmission signal conductive or cut off and a second FET which makes a path of a reception signal conductive or cut off. It switches between transmission and reception modes. The terminal is connected to the second FET and receives a control signal which switches between the transmission and reception modes. The logical inversion circuit includes third and fourth FETs having a threshold voltage equal to the first threshold voltage and having source electrodes connected to each other. The logical inversion circuit outputs a first voltage equal to a high level of the control signal to a gate electrode of the first FET in the transmission mode.Type: ApplicationFiled: May 14, 2004Publication date: September 1, 2005Inventors: Toshiki Seshita, Yoshitomo Sagae