Patents by Inventor Yoshitoshi Sato
Yoshitoshi Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6232657Abstract: There is provided a semiconductor module which comprises a high thermal conductive silicon nitride substrate 10 having a thermal conductivity of 60 w/m·k or more, a semiconductor element 7 mounted on this high thermal conductive silicon nitride substrate 10, metal circuit plates 3 which are bonded on the semiconductor element-mounted side of this high thermal conductive silicon nitride substrate 10 and single metal plate 4a which is bonded to a side opposing to the semiconductor element-mounted side of this high thermal conductive silicon nitride substrate and is bonded on an apparatus casing 9 or a mounting board. By this constitution, there can be provided a semiconductor module having a simple structure, which can be miniaturized, and having an improved structure strength and an excellent heat cycle resistance property without requiring a heat sink plate or the like.Type: GrantFiled: April 17, 1998Date of Patent: May 15, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Hiroshi Komorita, Kazuo Ikeda, Michiyasu Komatsu, Yoshitoshi Sato, Takayuki Naba
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Patent number: 6040039Abstract: This invention provides a silicon nitride circuit board in which a metal circuit plate is bonded to a high thermal conductive silicon nitride substrate having a thermal conductivity of not less than 60 W/m K, wherein a thickness D.sub.S of the high thermal conductive silicon nitride substrate and a thickness D.sub.M of the metal circuit plate satisfy a relational formula D.sub.S .ltoreq.2D.sub.M. The silicon nitride circuit board is characterized in that, when a load acts on the central portion of the circuit board which is held at a support interval of 50 mm, a maximum deflection is not less than 0.6 mm until the silicon nitride substrate is broken. The silicon nitride circuit board is characterized in that, when an anti-breaking test is performed to the circuit board which is held at a support interval of 50 mm, an anti-breaking strength is not less than 500 MPa.Type: GrantFiled: November 14, 1997Date of Patent: March 21, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Kazuo Ikeda, Hiroshi Komorita, Yoshitoshi Sato, Michiyasu Komatsu, Nobuyuki Mizunoya
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Patent number: 5998000Abstract: This invention provides a silicon nitride circuit board in which a metal circuit plate is bonded to a high thermal conductive silicon nitride substrate having a thermal conductivity of not less than 60 W/m K, wherein a thickness D.sub.s of the high thermal conductive silicon nitride substrate and a thickness D.sub.M of the metal circuit plate satisfy a relational formula D.sub.s .ltoreq.2D.sub.M. The silicon nitride circuit board is characterized in that, when a load acts on the central portion of the circuit board which is held at a support interval of 50 mm, a maximum deflection is not less than 0.6 mm until the silicon nitride substrate is broken. The silicon nitride circuit board is characterized in that, when an anti-breaking test is performed to the circuit board which is held at a support interval of 50 mm, an anti-breaking strength is not less than 500 MPa.Type: GrantFiled: November 14, 1997Date of Patent: December 7, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Kazuo Ikeda, Hiroshi Komorita, Yoshitoshi Sato, Michiyasu Komatsu, Nobuyuki Mizunoya
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Patent number: 5928768Abstract: This invention provides a silicon nitride circuit board in which a metal circuit plate is bonded to a high thermal conductive silicon nitride substrate having a thermal conductivity of not less than 60 W/m K, wherein a thickness D.sub.s of the high thermal conductive silicon nitride substrate and a thickness D.sub.M of the metal circuit plate satisfy a relational formula D.sub.s .ltoreq.2D.sub.M. The silicon nitride circuit board is characterized in that, when a load acts on the central portion of the circuit board which is held at a support interval of 50 mm, a maximum deflection is not less than 0.6 mm until the silicon nitride substrate is broken. The silicon nitride circuit board is characterized in that, when an anti-breaking test is performed to the circuit board which is held at a support interval of 50 mm, an anti-breaking strength is not less than 500 MPa.Type: GrantFiled: September 4, 1996Date of Patent: July 27, 1999Assignee: Kabushiki Kaisha ToshibaInventors: Kazuo Ikeda, Hiroshi Komorita, Yoshitoshi Sato, Michiyasu Komatsu, Nobuyuki Mizunoya
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Patent number: 5744410Abstract: A high thermal conductive silicon nitride sintered body of this invention is characterized by containing more than 7.5 wt % to at most 17.5 wt % of a rare earth element in terms of the amount of an oxide thereof, if necessary, at most 1.0 wt % of at least one of aluminum nitride and alumina, if necessary, 0.1-3.0 wt % of at least one compound selected from the group consisting of oxides, carbides, nitrides, silicides and borides of Ti, Zr, Hf, V, Nb, Ta, Cr, Mo and W, and at most 0.3 wt % of Li, Na, K, Fe, Ca, Mg, Sr, Ba, Mn and B as impurity cationic elements in terms of total amount thereof, containing a .beta.-type silicon nitride crystal and a grain boundary phase. The sintered body has a ratio of a crystal compound phase in the grain boundary phase to the entire grain boundary phase of at least 20%, a porosity of at most 2.5% by volume, a thermal conductivity of at least 80 W/m.multidot.K and a three-point bending strength of at least 650 MPa at a room temperature.Type: GrantFiled: October 4, 1996Date of Patent: April 28, 1998Assignee: Kabushiki Kaisha ToshibaInventors: Michiyasu Komatsu, Kazuo Ikeda, Nobuyuki Mizunoya, Yoshitoshi Sato, Tatsuya Imaizumi, Kazuyuki Kondo
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Patent number: 5703397Abstract: A semiconductor ceramic multilayer package comprising an aluminum nitride substrate having a semiconductor element mounted on one surface thereof and a wiring pattern electrically connected to the semiconductor element, connecting terminals connected to the wiring pattern and disposed on the other surface of the aluminum nitride substrate, and a sealing member connected to the aluminum nitride substrate with a metallic bonding layer or a glass layer having a thickness of not more than 100 .mu.m in such a manner as to seal the semiconductor element possesses a notably improved heat-radiating property and accomplishes the object of increasing the number of pins and reducing the size of package.Type: GrantFiled: November 8, 1996Date of Patent: December 30, 1997Inventors: Mitsuyoshi Endo, Hironori Asai, Keiichi Yano, Yoshitoshi Sato
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Patent number: 5698896Abstract: A high thermal conductive silicon nitride structural member of the present invention contains a rare earth element in the range of 1.0 to 7.5 wt. % calculated as oxide thereof and Li, Na, K, Fe, Ca, Mg, Sr, Ba, Mn and B as impurity cationic elements in a total amount not greater than 0.3 wt. %, and has the thermal conductivity not less than 60 W/(m.K), preferably not less than 80 W/(m.K). Also, a high thermal conductive silicon nitride sintered body consists of silicon nitride particles and a grain boundary phase, a crystal compound phase in the grain boundary phase being not less than 20 vol. %, preferably not less than 50 vol. %, with respect to the entire grain boundary phase, and has the thermal conductivity not less than 60 W/(m.K), preferably not less than 80 W/(m.K).Type: GrantFiled: December 27, 1994Date of Patent: December 16, 1997Assignee: Kabushiki Kaisha ToshibaInventors: Michiyasu Komatsu, Yoshitoshi Sato, Katsuhiro Shinosawa, Mineyuki Yamaga
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Patent number: 5463248Abstract: A semiconductor package comprises an aluminum nitride substrate having a semiconductor element mounted thereon, a lead frame junctioned to the side of the aluminum nitride substrate directly contacting the mounted semiconductor element, and a ceramic sealing member junctioned to the aluminum nitride substrate so as to seal the semiconductor element. The lead frame has a coating layer of a nonmagnetic metallic material formed in a thickness of not more than 20 .mu.m on only one of the opposite surfaces of a lead frame matrix made of a ferromagnetic metal to which a bonding wire is to be junctioned. The layer of the nonmagnetic metallic material is formed by any of such thin film forming technique as the vacuum deposition technique, the spattering technique, and the plating technique. The coating layer formed on only one of the opposite surfaces of the lead frame matrix is capable of amply curbing the resistance and the dependency of inductance on frequency.Type: GrantFiled: May 17, 1994Date of Patent: October 31, 1995Assignees: Kabushiki Kaisha Toshiba, Sumitomo Metal Industries, Ltd., Sumitomo Metal Ceramics Inc.Inventors: Keiichi Yano, Takashi Takahashi, Kazuo Kimura, Yoshitoshi Sato, Kouji Yamakawa, Toshishige Yamamoto, Masafumi Fujii, Shizuki Hashimoto, Hiroshi Takamichi
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Patent number: 4290042Abstract: A controller for electric motors comprises a casing, a carbon pile resistor contained in a through hole of an insulating frame carried by the casing, a U-shaped spring conductor plate with an end secured to the insulating frame, a rotational plate pivotally supported on the casing, a first terminal connected to an end of the carbon pile resistor, and a second terminal connected to the conductor plate. The other end of the conductor plate is operatively connected to the rotational plate. Thus the other end of the conductor plate is biased and presses the other end of the carbon pile resistor in response to the rotation of the rotational plate.Type: GrantFiled: July 26, 1979Date of Patent: September 15, 1981Assignee: Yamamoto Electric Industrial Co., Ltd.Inventor: Yoshitoshi Sato