Patents by Inventor Yoshitsugu Abe

Yoshitsugu Abe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240066504
    Abstract: Provided is a technique for molding a functional material without deteriorating the function of the functional material. A method for producing a functional material molded article of the present disclosure includes: dispersing a functional material in a water-alcohol mixed solution to obtain a liquid dispersion; impregnating a porous molding base material with the liquid dispersion to obtain an impregnated product; and drying the impregnated product.
    Type: Application
    Filed: February 1, 2022
    Publication date: February 29, 2024
    Applicant: JAPAN AEROSPACE EXPLORATION AGENCY
    Inventors: Asuka SHIMA, Yoshitsugu SONE, Motohiko SATO, Takayuki ABE, Mitsuhiro INOUE
  • Patent number: 6284670
    Abstract: After an Si wafer is anisotropically etched through an etching mask having an opening in an anisotropically etching solution, an etching face of the Si wafer emerged by the anisotropic etching is subjected to anodic oxidation by applying a positive voltage for anodic oxidation on the Si wafer. As a result, the etching face of the Si wafer is isotropically etched due to the anodic oxidation in the anisotropic etching solution. By the isotropic etching thus performed, a sharp corner formed at an end portion of a recess portion formed in the Si wafer by the anisotropic etching, is rounded. Because the isotropic etching reaction progresses very slowly in comparison with the anisotropic etching, control of the etching can be made easy and accurately. As a result, the thickness of the diaphragm can be prevented from being dispersed.
    Type: Grant
    Filed: July 23, 1998
    Date of Patent: September 4, 2001
    Assignee: Denso Corporation
    Inventors: Yoshitsugu Abe, Hiroshi Tanaka, Atsushi Sakaida, Toshihisa Taniguchi, Tsuyoshi Fukada
  • Patent number: 6194236
    Abstract: An etching method for a silicon substrate, which can easily smooth the etching surface of the (110)-oriented silicon, is disclosed. A container is filled with KOH solution. In the KOH solution is immersed a (110)-oriented silicon wafer having a PN junction and is also disposed a platinum electrode plate to face the silicon wafer. To between a platinum electrode of the silicon wafer and the platinum electrode plate are connected a constant voltage power source, an ammeter and a contact in series. A controller starts etching from one surface on which the PN junction is formed, and terminates voltage application when the specified time lapses after the formation of an anodic oxide film is equilibrated with the etching of the anodic oxide film on the etching surface on the PN junction part.
    Type: Grant
    Filed: February 11, 1999
    Date of Patent: February 27, 2001
    Assignee: Denso Corporation
    Inventors: Minekazu Sakai, Tsuyoshi Fukada, Yukihiko Tanizawa, Koki Mizuno, Yasutoshi Suzuki, Yoshitsugu Abe, Hiroshi Tanaka, Motoki Ito, Kazuhisa Ikeda, Hiroshi Okada
  • Patent number: 5972236
    Abstract: A silicon substance is etched by using alkaline etchant containing additive (Cu, Pb, Mg). The content of the additive is controlled intentionally to provide desired etching quality during an etching operation.
    Type: Grant
    Filed: August 11, 1997
    Date of Patent: October 26, 1999
    Assignee: Denso Corporation
    Inventors: Hiroshi Tanaka, Yoshitsugu Abe, Motoki Ito, Kazuyuki Inoue, Satoru Kosaka
  • Patent number: 5949118
    Abstract: An etching method for a silicon substrate, which can easily smooth the etching surface of the (110)-oriented silicon, is disclosed. A container is filled with KOH solution. In the KOH solution is immersed a (110)-oriented silicon wafer having a PN junction and is also disposed a platinum electrode plate to face the silicon wafer. To between a platinum electrode of the silicon wafer and the platinum electrode plate are connected a constant voltage power source, an ammeter and a contact in series. A controller starts etching from one surface on which the PN junction is formed, and terminates voltage application when the specified time lapses after the formation of an anodic oxide film is equilibrated with the etching of the anodic oxide film on the etching surface on the PN junction part.
    Type: Grant
    Filed: April 24, 1996
    Date of Patent: September 7, 1999
    Assignee: Nippondenso Co., Ltd.
    Inventors: Minekazu Sakai, Tsuyoshi Fukada, Koki Mizuno, Yasutoshi Suzuki, Yoshitsugu Abe, Hiroshi Tanaka, Motoki Ito, Kazuhisa Ikeda, Hiroshi Okada
  • Patent number: 5912903
    Abstract: A communication method applied to a communication system is provided for enhancing communication performance such as a throughput and a turn around time in the so-called intra-computer communication. In the communication procedure, when a source end system (SES) like a host computer transfers data to a destination end system (DES) such as a LAN or a WAN through a communication control system (CCS), the CCS served as a virtual destination receives the data and transmits an acknowledge (+Cresp) to the SES. In response to the acknowledge (+Crest), the SES performs the next transfer of the data. In response to the last acknowledge, the SES operates to output an indication about completion of the data transmission (End TX-C). The CCS continues to transfer the data temporarily received from the SES to the DES unless the CCS receives the acknowledge from the DES. The acknowledge +Cresp contains information about an amount of data transferred from the CCS to the DES.
    Type: Grant
    Filed: October 9, 1996
    Date of Patent: June 15, 1999
    Assignee: Hitachi, Ltd.
    Inventors: Susumu Nakayashiki, Yoshitsugu Abe, Mitsugu Kohatsu, Kiyoyuki Takemi, Osamu Kinoshita
  • Patent number: 5899750
    Abstract: In a fine processing method for forming a silicon substrate, first, an oxynitride layer is formed on the silicon substrate. Thereafter, a silicon nitride layer is formed on the oxynitride layer and patterned into a predetermined shape to cause it to function as an etching mask. The silicon substrate is etched through the etching mask. In this case, because of the oxynitride layer formed between the silicon substrate and the silicon nitride layer, an interface between the silicon substrate and the silicon nitride layer is not easily eroded in the etching process. As a result, processing accuracy of the substrate is improved.
    Type: Grant
    Filed: March 12, 1997
    Date of Patent: May 4, 1999
    Assignee: Denso Corporation
    Inventors: Hiroshi Tanaka, Yoshitsugu Abe, Koji Matsumoto, Kazuyuki Inoue