Patents by Inventor Yoshitsugu Dohi

Yoshitsugu Dohi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6646494
    Abstract: When a stage increasing signal, which is input into a sub boosting circuit, is at the L level, three boosting stages are used within the sub boosting circuit to boost a supply potential. On the other hand, when the stage increasing signal is at an H level, four boosting stages are used within the sub boosting circuit to boost the supply potential. Thus, by the semiconductor integrated circuit device of the invention, an internal potential can be boosted at a high speed while power consumption can be reduced.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: November 11, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshitsugu Dohi, Akira Hosogane
  • Patent number: 6621740
    Abstract: A specific row of memory cells in a flash memory is set to be in a lock mode state, which affects reading of data in other rows of memory cells in a common memory array. Thus, a flash memory having a data concealing function is achieved.
    Type: Grant
    Filed: October 16, 2001
    Date of Patent: September 16, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akira Hosogane, Yoshitsugu Dohi
  • Patent number: 6549480
    Abstract: An internal voltage from an internal voltage generating circuit is transmitted to a pad in accordance with a control signal, and a buffer circuit coupled to the pad is set in an inactive state. The pad is connected to an external pin terminal via a bonding wire. Consequently, a semiconductor integrated circuit capable of monitoring and forcedly setting an internal voltage from an outside of the circuit device is realized with a minimum number of pin terminals without increasing the number of external pin terminals.
    Type: Grant
    Filed: February 1, 2001
    Date of Patent: April 15, 2003
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akira Hosogane, Yoshitsugu Dohi, Hiroaki Nakai, Tatsuya Saeki
  • Publication number: 20030006823
    Abstract: When a stage increasing signal, which is input into a sub boosting circuit, is at the L level, three boosting stages are used within the sub boosting circuit to boost a supply potential. On the other hand, when the stage increasing signal is at an H level, four boosting stages are used within the sub boosting circuit to boost the supply potential. Thus, by the semiconductor integrated circuit device of the invention, an internal potential can be boosted at a high speed while power consumption can be reduced.
    Type: Application
    Filed: November 16, 2001
    Publication date: January 9, 2003
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshitsugu Dohi, Akira Hosogane
  • Publication number: 20020101763
    Abstract: A specific row of memory cells in a flash memory is set to be in a lock mode state, which affects reading of data in other rows of memory cells in a common memory array. Thus, a flash memory having a data concealing function is achieved.
    Type: Application
    Filed: October 16, 2001
    Publication date: August 1, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akira Hosogane, Yoshitsugu Dohi
  • Publication number: 20020024330
    Abstract: An internal voltage from an internal voltage generating circuit is transmitted to a pad in accordance with a control signal, and a buffer circuit coupled to the pad is set in an inactive state. The pad is connected to an external pin terminal via a bonding wire. Consequently, a semiconductor integrated circuit capable of monitoring and forcedly setting an internal voltage from an outside of the circuit device is realized with a minimum number of pin terminals without increasing the number of external pin terminals.
    Type: Application
    Filed: February 1, 2001
    Publication date: February 28, 2002
    Applicant: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akira Hosogane, Yoshitsugu Dohi, Hiroaki Nakai, Tatsuya Saeki
  • Patent number: 5583460
    Abstract: An improved output driver circuit for a semiconductor integrated circuit device, wherein a stepped control voltage generation circuit is connected to the gate of a driving transistor for driving an output terminal DQ. The stepped control voltage generation circuit responds to an applied input data signal to provide a stepped control voltage changing in a stepped form including a plurality of steps to the gate of the driving transistor. The driving transistor therefore changes its state on a step by step basis from a cut off state to a conduction state. Thus, sharp change in output current flowing through the output terminal can be prevented, and noise caused by a parasitic inductance can be avoided, thus preventing an erroneous operation in the device.
    Type: Grant
    Filed: October 28, 1994
    Date of Patent: December 10, 1996
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yoshitsugu Dohi, Toru Shiomi, Yoshito Nakaoka