Patents by Inventor Yoshitsugu Inoue

Yoshitsugu Inoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240066504
    Abstract: Provided is a technique for molding a functional material without deteriorating the function of the functional material. A method for producing a functional material molded article of the present disclosure includes: dispersing a functional material in a water-alcohol mixed solution to obtain a liquid dispersion; impregnating a porous molding base material with the liquid dispersion to obtain an impregnated product; and drying the impregnated product.
    Type: Application
    Filed: February 1, 2022
    Publication date: February 29, 2024
    Applicant: JAPAN AEROSPACE EXPLORATION AGENCY
    Inventors: Asuka SHIMA, Yoshitsugu SONE, Motohiko SATO, Takayuki ABE, Mitsuhiro INOUE
  • Publication number: 20220348069
    Abstract: A vehicle driving device mounted on a hybrid vehicle includes an engine coupled to wheels of the vehicle via a power transmission path, a transmission mechanism disposed on the power transmission path, a motor generator, a first power transmission mechanism, and a second power transmission mechanism. The motor generator is disposed on a path coupling the engine and transmission mechanism, the first power transmission mechanism is disposed on a path coupling the engine and motor generator, the second power transmission mechanism is disposed on a path coupling the motor generator and transmission mechanism. These paths are included in the power transmission path. The first power transmission mechanism includes a large-diameter rotator and a small-diameter rotator coupled to the engine and the motor generator respectively. The second power transmission mechanism includes a small-diameter rotator and a large-diameter rotator coupled to the motor generator and the transmission mechanism respectively.
    Type: Application
    Filed: April 20, 2022
    Publication date: November 3, 2022
    Applicant: SUBARU CORPORATION
    Inventors: Yoshinobu YAMAZAKI, Masami OGURI, Yoshitsugu INOUE
  • Patent number: 11485345
    Abstract: A vehicle control apparatus, configured to control a vehicle, includes an engine that is configured to drive wheels via a power transmission device. The vehicle control apparatus includes a towing state detector and an engine controller. The towing state detector is configured to detect whether the vehicle is in a towing state. The engine controller is configured to stop the engine in a case where a predetermined engine stopping condition is satisfied during traveling of the vehicle. The engine controller is configured to vary, in a case where the towing state detector detects that the vehicle is in the towing state, the predetermined engine stopping condition to reduce an operational range in which the engine is to be stopped compared with an operational range in a case where the towing state detector does not detect that the vehicle is in the towing state.
    Type: Grant
    Filed: June 24, 2019
    Date of Patent: November 1, 2022
    Assignee: SUBARU CORPORATION
    Inventors: Kyousuke Kuroda, Mitsuo Aoki, Yoshitsugu Inoue, Shinya Sagawa, Tomoyuki Yamamuro, Akihito Katsume
  • Patent number: 10995850
    Abstract: A vehicle includes a transmission shiftable by hydraulic pressure, a main oil passage that delivers operating oil, a first oil passage that delivers the operating oil from the main oil passage to the transmission, a first valve that opens/closes the first oil passage, a controller that controls the first valve, a second oil passage that delivers the operating oil from the main oil passage to the transmission, and a manually drivable second valve that opens/closes a section of the first oil passage that is closer to the main oil passage than the first valve and the second oil passage. The second valve is switchable between the automatic control state in which the first oil passage is opened and the second oil passage is closed and the manual control state in which the first oil passage is closed and the second oil passage is opened.
    Type: Grant
    Filed: November 1, 2019
    Date of Patent: May 4, 2021
    Assignee: SUBARU CORPORATION
    Inventors: Yoshitsugu Inoue, Mitsuo Aoki, Kyousuke Kuroda, Tomoyuki Yamamuro, Akihito Katsume, Shinya Sagawa
  • Publication number: 20200166124
    Abstract: A vehicle includes a transmission shiftable by hydraulic pressure, a main oil passage that delivers operating oil, a first oil passage that delivers the operating oil from the main oil passage to the transmission, a first valve that opens/closes the first oil passage, a controller that controls the first valve, a second oil passage that delivers the operating oil from the main oil passage to the transmission, and a manually drivable second valve that opens/closes a section of the first oil passage that is closer to the main oil passage than the first valve and the second oil passage. The second valve is switchable between the automatic control state in which the first oil passage is opened and the second oil passage is closed and the manual control state in which the first oil passage is closed and the second oil passage is opened.
    Type: Application
    Filed: November 1, 2019
    Publication date: May 28, 2020
    Inventors: Yoshitsugu INOUE, Mitsuo AOKI, Kyousuke KURODA, Tomoyuki YAMAMURO, Akihito KATSUME, Shinya SAGAWA
  • Publication number: 20200086846
    Abstract: A vehicle control apparatus, configured to control a vehicle, includes an engine that is configured to drive wheels via a power transmission device. The vehicle control apparatus includes a towing state detector and an engine controller. The towing state detector is configured to detect whether the vehicle is in a towing state. The engine controller is configured to stop the engine in a case where a predetermined engine stopping condition is satisfied during traveling of the vehicle. The engine controller is configured to vary, in a case where the towing state detector detects that the vehicle is in the towing state, the predetermined engine stopping condition to reduce an operational range in which the engine is to be stopped compared with an operational range in a case where the towing state detector does not detect that the vehicle is in the towing state.
    Type: Application
    Filed: June 24, 2019
    Publication date: March 19, 2020
    Inventors: Kyousuke KURODA, Mitsuo AOKI, Yoshitsugu INOUE, Shinya SAGAWA, Tomoyuki YAMAMURO, Akihito KATSUME
  • Patent number: 7054979
    Abstract: The method of routing configuration accesses applied from the primary port to a plurality of secondary ports includes the steps of: distributing a plurality of configuration accesses received from the primary bus to the plurality of secondary ports in accordance with a predetermined algorithm, such that each of the devices on the secondary ports receives and responds to exactly a single access; and terminating configuration cycles after distributing the plurality of configuration accesses.
    Type: Grant
    Filed: November 1, 2001
    Date of Patent: May 30, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Robert Streitenberger, Hiroyuki Kawai, Yoshitsugu Inoue, Junko Kobara
  • Patent number: 7038684
    Abstract: An input section inputs vertex data from a host CPU or a geometry process section to a rendering main process section. The rendering main process section performs a rendering process in accordance with the vertex data inputted into the input section. Therefore, the host CPU can directly write the vertex data, which does not require a geometry process, to a rendering process apparatus and a processing speed of an overall graphics system can be thereby improved.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: May 2, 2006
    Assignee: Renesas Technology Corp.
    Inventors: Yoshitsugu Inoue, Hiroyuki Kawai, Junko Kobara, Yoshiyuki Kato
  • Publication number: 20060001670
    Abstract: An input section inputs vertex data from a host CPU or a geometry process section to a rendering main process section. The rendering main process section performs a rendering process in accordance with the vertex data inputted into the input section. Therefore, the host CPU can directly write the vertex data, which does not require a geometry process, to a rendering process apparatus and a processing speed of an overall graphics system can be thereby improved.
    Type: Application
    Filed: September 6, 2005
    Publication date: January 5, 2006
    Applicant: Renesas Technology Corp.
    Inventors: Yoshitsugu Inoue, Hiroyuki Kawai, Junko Kobara, Yoshiyuki Kato
  • Patent number: 6950106
    Abstract: A clock control unit (7) detects completion of data processing based on a busy signal BSY1 output by a geometry processing unit (4) and a busy signal BSY2 output by a rendering processing unit (5). The clock control unit (7) controls supply of a clock signal CLK1 to the geometry processing unit (4) and supply of a clock signal CLK2 to the rendering processing unit (5) so as to cause the geometry processing unit (4) and the rendering processing unit (5) to alternately operate.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: September 27, 2005
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Akira Torii, Yoshiyuki Kato, Masatoshi Kameyama, Yoshitsugu Inoue
  • Publication number: 20050108698
    Abstract: An instruction analyzing unit sequentially analyzes instructions of a program which is inputted to a program inputting unit. A NOP instruction analyzing part encodes continuous NOP instructions as one continuous NOP instruction. An instruction code outputting unit outputs the instruction encoded by the instruction analyzing unit as an object code. Therefore, the size of the object code can be reduced.
    Type: Application
    Filed: May 10, 2004
    Publication date: May 19, 2005
    Inventors: Junko Kobara, Hiroyuki Kawai, Hiroyuki Morinaka, Yoshitsugu Inoue
  • Patent number: 6820107
    Abstract: A square root extraction circuit and a floating-point square root extraction device which simplify a circuit structure and improve an operation speed are provided. Portions for generating square root partial data (q3 to q8) include carry output prediction circuits (3 to 8), respectively. The carry output prediction circuit (i) (i equals any one of 3 to 8) receives condition flags (AHin, ALin), the most significant addition result (SUM), and square root partial data (q(i−1)) from the preceding square root partial data generating portion, and also receives a carry input (Cin) to output condition flags (AHout, ALout) for the next square root partial data generating portion, and square root partial data (q(i)). The condition flags (AHout, ALout) serve as the condition flags (AHin, ALin) for the carry output prediction circuit (i+1), respectively.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: November 16, 2004
    Assignee: Renesas Technology Corporation
    Inventors: Hiroyuki Kawai, Robert Streitenberger, Yoshitsugu Inoue, Hiroyuki Morinaka
  • Patent number: 6795075
    Abstract: A graphic processor includes first and second buses and a plurality of geometric operation units having an output connected to the second bus, and a circuit to allocate a plurality of ordered data blocks formed of data to be operated upon to the plurality of geometric operation units, and an input of at least one of the plurality of geometric operation units is connected to the first bus. The plurality of geometric operation units include all arbitrating circuit to arbitrate the order of output between an output buffer to store a result of processing by the allocated data blocks and another geometric operation unit, and output data resulting from processing onto the second bus in an order corresponding to the sequence of the plurality of data blocks of data to be operated upon.
    Type: Grant
    Filed: October 11, 2000
    Date of Patent: September 21, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Robert Streitenberger, Hiroyuki Kawai, Junko Kobara, Yoshitsugu Inoue, Keijiro Yoshimatsu
  • Publication number: 20040125104
    Abstract: A clock control unit (7) detects completion of data processing based on a busy signal BSY1 output by a geometry processing unit (4) and a busy signal BSY2 output by a rendering processing unit (5). The clock control unit (7) controls supply of a clock signal CLK1 to the geometry processing unit (4) and supply of a clock signal CLK2 to the rendering processing unit (5) so as to cause the geometry processing unit (4) and the rendering processing unit (5) to alternately operate.
    Type: Application
    Filed: October 28, 2003
    Publication date: July 1, 2004
    Inventors: Akira Torii, Yoshiyuki Kato, Masatoshi Kameyama, Yoshitsugu Inoue
  • Publication number: 20040119723
    Abstract: An apparatus for manipulating a face image such as a portrait which produces visual effects to keep interesting a user with simple processes without requiring preparation of a complex model and a number-crunching process for processing the model is provided.
    Type: Application
    Filed: June 5, 2003
    Publication date: June 24, 2004
    Applicant: Renesas Technology Corp.
    Inventors: Yoshitsugu Inoue, Akira Torii
  • Patent number: 6711601
    Abstract: A logarithmic arithmetic unit includes first logarithmic operation part multiplying an exponent part of floating-point data by a prescribed value, a logarithmic table memory outputting a logarithmic value corresponding to bit data expressing a digit higher than a prescribed digit of a fixed-point part of the floating-point data, divisional precision decision part deciding divisional precision on the basis of the exponent part, division part performing division on a dividend obtained by subtracting the bit data from the fixed-point part and a divisor of the bit data and obtaining a result of division of a number of digits set on the basis of the divisional precision, second logarithmic operation part obtaining the logarithmic value of a value obtained by dividing the fixed-point part by the bit data and sum operation part adding outputs from the first and second logarithmic operation parts and the logarithmic table memory to each other.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: March 23, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Yoshitsugu Inoue, Hiroyuki Kawai, Junko Kobara, Robert Streitenberger
  • Patent number: 6697889
    Abstract: An FIFO data transfer control device includes an instruction analyzing portion for analyzing an instruction for data transfer to an FIFO storage device including a plurality of banks, and calculating an amount of data to be transferred; a data count portion for calculating, from the data amount calculated by the instruction analyzing portion, an amount of the data written in the bank being in an outputting state, and issuing a determination flag indicating whether the free space of the bank being in the outputting state satisfies predetermined conditions or not; and a full check portion for inhibiting processing of a next instruction until the determination flag sent from the data count portion or the full flag issued from the FIFO storage device is reset.
    Type: Grant
    Filed: February 8, 2001
    Date of Patent: February 24, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Junko Kobara, Hiroyuki Kawai, Yoshitsugu Inoue, Robert Streitenberger
  • Patent number: 6675251
    Abstract: A bridge includes a first port connected to a Primary bus, and second ports respectively connected to second buses. The first port includes a PCI master, a PCI slave and an AGP master. Each of the second ports includes a PCI master, a PCI target and an AGP Target. The bridge further includes a plurality of first-in-first-out memories forming asynchronous data paths between the first port and the second ports and arbitrators for arbitrating a contention between the transactions on the data paths formed by the first-in-first-out memories based on the protocols related to the transactions.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: January 6, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Robert Streitenberger, Hiroyuki Kawai, Yoshitsugu Inoue, Junko Kobara
  • Publication number: 20030206173
    Abstract: The geometry processor includes mutually independent first and second external interface ports connected to a host processor, and a rendering processor, respectively, and a geometry calculation core which processes a geometry calculation applied through the first external interface port from the host processor. The geometry calculation core includes a plurality of SIMD type floating point calculating units, a floating point power computing unit, an integer calculating unit, a controller responsive to an instruction from the host processor which controls the plurality of floating point calculating units, the floating point power computing unit and the integer calculating unit to process data from the host processor, and an output controller which outputs the processed data to the rendering processor through the second external interface port.
    Type: Application
    Filed: March 19, 2003
    Publication date: November 6, 2003
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Hiroyuki Kawai, Robert Streitenberger, Yoshitsugu Inoue, Keijiro Yoshimatsu, Junko Kobara, Hiroyasu Negishi
  • Publication number: 20030197705
    Abstract: The geometry processor includes mutually independent first and second external interface ports connected to a host processor, and a rendering processor, respectively, and a geometry calculation core which processes a geometry calculation applied through the first external interface port from the host processor. The geometry calculation core includes a plurality of SIMD type floating point calculating units, a floating point power computing unit, an integer calculating unit, a controller responsive to an instruction from the host processor which controls the plurality of floating point calculating units, the floating point power computing unit and the integer calculating unit to process data from the host processor, and an output controller which outputs the processed data to the rendering processor through the second external interface port.
    Type: Application
    Filed: November 14, 2002
    Publication date: October 23, 2003
    Applicant: MITSUBISHI DENKI KABUSHIKI KAISHA
    Inventors: Hiroyuki Kawai, Robert Streitenberger, Yoshitsugu Inoue, Keijiro Yoshimatsu, Junko Kobara, Hiroyasu Negishi