Patents by Inventor Yoshiyasu Tsuruoka

Yoshiyasu Tsuruoka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5889426
    Abstract: Disclosed is an integrated circuit device. According to the present invention, an integrated circuit device comprises: a high frequency electronic circuit having a first enhancement transistor, to the gate of which, at least, a bias voltage is applied; and a bias circuit, including a second enhancement transistor formed on a substrate on which the first enhancement transistor is formed, and first, second and third resistors connected in series between a positive power source and a power source ground, in which a connection point of the first and the second resistors is connected to a drain of the second enhancement transistor, a connection point of the second and the third resistors is connected to a gate of the second enhancement transistor, and voltages at the connection point of the second resistor and the third resistor or at a terminal which is closer to the power source ground is applied as a bias voltage to the high frequency electronic circuit.
    Type: Grant
    Filed: August 8, 1997
    Date of Patent: March 30, 1999
    Assignee: Fujitsu Limited
    Inventors: Masayuki Kawakami, Yoshiyasu Tsuruoka, Hideo Abe
  • Patent number: 5808515
    Abstract: A semiconductor amplifying circuit of the present invention comprises: an amplifying field effect transistor device having a gate supplied with an input signal and a drain for outputting an amplified output signal; and a bias circuit for supplying a bias voltage to said gate of said amplifying transistor device. The bias circuit includes: a first bias voltage generator having a first dummy field effect transistor device formed on a same substrate as said amplifying transistor device is formed, and a voltage feedback bias circuit for supplying a bias voltage to a gate of said first dummy transistor device; and a second bias voltage generator for supplying a lower potential to said voltage feedback bias circuit when a drain current of said field effect transistor device increases, and supplying a higher potential to said voltage feedback bias circuit when said drain current decreases.
    Type: Grant
    Filed: October 15, 1996
    Date of Patent: September 15, 1998
    Assignee: Fujitsu Limited
    Inventors: Yoshiyasu Tsuruoka, Takahisa Kawai
  • Patent number: 5760632
    Abstract: The present invention relates to a double-balanced mixer circuit. The double-balanced mixer circuit consists of a first differential circuit formed of a first transistor and a second transistor connected differentially to each other for receiving a first input signal; and a second differential circuit formed of a third transistor and a fourth transistor connected differentially to each other for receiving a second input signal; either the junction of the drain or collector of the first transistor and the drain or collector of the third transistor or the junction of the drain or collector of the second transistor and the drain or collector of the fourth transistor producing an output signal having frequency information on the sum of the first input signal and the second input signal or the difference between them. The double-balanced mixer circuit is used suitably as a frequency converter which is used at the high-frequency section in a mobile communications equipment such as portable telephones.
    Type: Grant
    Filed: April 30, 1996
    Date of Patent: June 2, 1998
    Assignee: Fujitsu Limited
    Inventors: Masayuki Kawakami, Yoshiyasu Tsuruoka
  • Patent number: 5666090
    Abstract: A high-frequency coupler includes a main transmission line having a microstrip line arranged on a base, a coupling part arranged on the base close to the main transmission line, and a conductive part provided within the base and connected to the coupling part through a throughhole. Therefore, the conductive part is influenced little by external sources.
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: September 9, 1997
    Assignee: Fujitsu Limited
    Inventor: Yoshiyasu Tsuruoka
  • Patent number: 5477187
    Abstract: In a feed forward amplifier, an RF amplifier is supplied with an input RF signal at an input terminal for amplifying the same; a distortion extraction loop supplied with the input RF signal and further with the output RF signal from the RF amplifier is for extracting non-linear distortion components formed in the output RF signal as a result of amplification in the RF amplifier; a variable phase shifter is provided in the distortion extraction loop for varying a phase of the input RF signal; a variable attenuator is provided in the distortion extraction loop for attenuating an amplitude of the input RF signal that has been supplied to the distortion extraction loop; and a distortion extraction circuit is provided in the distortion extraction loop for producing a distortion output signal that includes non-linear components; further, a control circuit is supplied with the input signal and with the distortion output signal for extracting a main signal component contained in the distortion output signal.
    Type: Grant
    Filed: April 22, 1994
    Date of Patent: December 19, 1995
    Assignee: Fujitsu Limited
    Inventors: Fumihiko Kobayashi, Isamu Umino, Yoshiyasu Tsuruoka, Junichi Hasegawa, Toshiaki Suzuki, Tomohiro Nakamura, Teruhiko Kitazawa, Mitsunori Hanaka
  • Patent number: 5296825
    Abstract: In a bias circuit including a transmission line and an open stub for preventing a microwave signal from passing through, the lengths of the open stub and a transmission line between the open stub and main transmission line are near .lambda./4 but not equal to .lambda./4. A leakage signal caused by the above deviations is fed to a detector portion. In the above construction, circuit size of the bias circuit and the detector portion is minimized.
    Type: Grant
    Filed: September 4, 1992
    Date of Patent: March 22, 1994
    Assignee: Fujitsu Limited
    Inventor: Yoshiyasu Tsuruoka
  • Patent number: 5117202
    Abstract: Automatic Level Control (ALC) circuit having a directional coupler, for branching an output of an amplifier, and a detector, for detecting the branched output, is disclosed. When saturation of the amplifier is measured, coupling by the directional coupler is decreased and the input signal to the detector can be kept below a predetermined value.
    Type: Grant
    Filed: January 24, 1991
    Date of Patent: May 26, 1992
    Assignee: Fujitsu Limited
    Inventor: Yoshiyasu Tsuruoka