Abstract: A vehicle control apparatus includes: a steering control unit connected to an in-vehicle communication network mounted on a vehicle and configured to control a steering motor configured to add an auxiliary torque corresponding to a steering operation by a driver to a steering mechanism; and an illegal signal detection unit connected to the in-vehicle communication network and configured to detect an illegal signal input to the in-vehicle communication network. The steering control unit restricts the auxiliary torque when the illegal signal is detected by the illegal signal detection unit.

Abstract: An authentication system includes a vehicle onboard ECU, an update tool for vehicle control software, and an authentication server for the update tool. The update tool substitutes predetermined-constant and first-random-number into predetermined-function to generate first-value and send it to the authentication server. The authentication server signs the first-value using secret-key and send it to the update tool. The update tool transmits the first-value and signature to the ECU upon connection. The ECU verifies the signature using public-key and substitutes the predetermined-constant and second-random-number into the predetermined-function to generate second-value and send it to the update tool. The update tool substitutes the second-value and first-random-number into the predetermined-function to generate third-value. The ECU substitutes the first-value and second-random-number into the predetermined-function to generate fourth-value upon verification of the signature.

Abstract: An authentication system includes a vehicle onboard ECU, an update tool for vehicle control software, and an authentication server for the update tool. The update tool substitutes predetermined-constant and first-random-number into predetermined-function to generate first-value and send it to the authentication server. The authentication server signs the first-value using secret-key and send it to the update tool. The update tool transmits the first-value and signature to the ECU upon connection. The ECU verifies the signature using public-key and substitutes the predetermined-constant and second-random-number into the predetermined-function to generate second-value and send it to the update tool. The update tool substitutes the second-value and first-random-number into the predetermined-function to generate third-value. The ECU substitutes the first-value and second-random-number into the predetermined-function to generate fourth-value upon verification of the signature.

Abstract: An information processing apparatus includes a nonvolatile memory, a flag settable to a first value indicating that a program stored in a memory region of the nonvolatile memory has not been verified, and to a second value indicating that the program has been verified, a switching circuit configured to set the flag to the first value, in response to a request for permission to modify the program stored in the memory region, and a verification circuit that sets the flag to the second value upon verification of the program stored in the memory region, and upon restart of the information processing apparatus, carries out a verification process of the program prior to execution of the program if the first value is set in the flag, and executes the program without the verification process if the second value is set in the flag.

Abstract: A semiconductor integrated circuit includes a logic circuit including a plurality of storage elements which can each store 1-bit information and an attack detection circuit, the attack detection circuit includes an error determination circuit which can detect through a logic operation that errors have occurred in codes stored in said a plurality of storage elements, and a light irradiation detection circuit which has a light detection element and can detect light irradiation, a light detection element is disposed in the center of area for detecting light irradiation surrounding a plurality of storage elements. It is determined that the logic circuit has been attacked from outside when the error determination circuit detects an error or the light irradiation detection circuit detects light irradiation.

Abstract: A semiconductor integrated circuit includes a logic circuit including a plurality of storage elements which can each store 1-bit information and an attack detection circuit, the attack detection circuit includes an error determination circuit which can detect through a logic operation that errors have occurred in codes stored in said a plurality of storage elements, and a light irradiation detection circuit which has a light detection element and can detect light irradiation, a light detection element is disposed in the center of area for detecting light irradiation surrounding a plurality of storage elements. It is determined that the logic circuit has been attacked from outside when the error determination circuit detects an error or the light irradiation detection circuit detects light irradiation.

Abstract: An information processing apparatus includes a nonvolatile memory, a flag settable to a first value indicating that a program stored in a memory region of the nonvolatile memory has not been verified, and to a second value indicating that the program has been verified, a switching circuit configured to set the flag to the first value, in response to a request for permission to modify the program stored in the memory region, and a verification circuit that sets the flag to the second value upon verification of the program stored in the memory region, and upon restart of the information processing apparatus, carries out a verification process of the program prior to execution of the program if the first value is set in the flag, and executes the program without the verification process if the second value is set in the flag.

Abstract: A logic circuit includes n storage elements (n is a positive integer) which can each store 1-bit information, and an attack detection circuit. The attack detection circuit includes an error determination circuit which can detect through a logic operation that k-bit or less errors (k is a positive integer) have occurred in n-bit codes stored in the n storage elements, and a light irradiation detection circuit which has light detection elements and can detect that light has been irradiated to (k+1) or more of the n storage elements, and it is determined that the logic circuit has been attacked from outside when the error determination circuit detects an error or the light irradiation detection circuit detects light irradiation.

Abstract: A logic circuit includes n storage elements (n is a positive integer) which can each store 1-bit information, and an attack detection circuit. The attack detection circuit includes an error determination circuit which can detect through a logic operation that k-bit or less errors (k is a positive integer) have occurred in n-bit codes stored in the n storage elements, and a light irradiation detection circuit which has light detection elements and can detect that light has been irradiated to (k+1) or more of the n storage elements, and it is determined that the logic circuit has been attacked from outside when the error determination circuit detects an error or the light irradiation detection circuit detects light irradiation.

Abstract: A semiconductor device includes a central processing unit (CPU), a first memory which stores a plurality of split keys, a second memory which stores an encryption code as at least one of an encrypted instruction and encrypted data, the plurality of split keys including an encryption key for decrypting the encryption code, and a decrypter which reads the encryption code from the second memory, decrypts the encryption code with the use of the encryption key, and supplies the decrypted encryption code to the CPU. The second memory stores an encryption key reading program which is executed by the CPU to restore the encryption key and to supply the encryption key to the decrypter, by reading and reconfiguring the split keys stored in the first memory in a distributed manner.

Abstract: A semiconductor device includes a CPU, an EEPROM, and a ROM. The ROM includes an encryption area and a non-encryption area and the encrypted firmware is stored in the encryption area. The semiconductor device includes a decrypter which holds the encryption key, decrypts the encrypted firmware, and supplies the decrypted firmware to the CPU. The EEPROM includes a system area to which an access from the CPU is forbidden in a user mode. The encryption key is divided into split keys of plural bit strings, and stored in the distributed address areas in the system area. An encryption key reading program which is not encrypted is stored in the non-encryption area of the ROM. Executing the encryption key reading program, the CPU reads and reconfigures plural split keys stored in the EEPROM in a distributed manner to restore the encryption key and supplies the restored encryption key to the decrypter.

Abstract: A method of a semiconductor integrated circuit comprising a logic circuit including n storage elements (n is a positive integer) which can each store 1-bit information and an attack detection circuit, the method including detecting, by an error determination circuit, through a logic operation that k-bit or less errors (k is a positive integer) have occurred in n-bit codes stored in the n storage elements, and detecting, by a light irradiation detection circuit which includes light detection elements, that light has been irradiated to (k+1) or more of the n storage elements. It is determined that the logic circuit has been attacked from outside when the error determination circuit detects an error or the light irradiation detection circuit detects light irradiation.

Abstract: A method of a semiconductor integrated circuit comprising a logic circuit including n storage elements (n is a positive integer) which can each store 1-bit information and an attack detection circuit, the method including detecting, by an error determination circuit, through a logic operation that k-bit or less errors (k is a positive integer) have occurred in n-bit codes stored in the n storage elements, and detecting, by a light irradiation detection circuit which includes light detection elements, that light has been irradiated to (k+1) or more of the n storage elements. It is determined that the logic circuit has been attacked from outside when the error determination circuit detects an error or the light irradiation detection circuit detects light irradiation.

Abstract: A semiconductor integrated circuit includes a logic circuit, the logic circuit including an attack detection circuit for checking multi-bit storage. The attack detection circuit includes an error determination circuit capable of detection through a logic operation such as a code theory and a light irradiation detection circuit having light detection elements, and the light detection elements are arranged so that the light irradiation detection circuit can detect errors of the number of bits beyond the detection limit of the error determination circuit. Due to error detection by the error determination circuit and light irradiation detection by the light irradiation detection circuit, the circuits complementarily detect fault attacks from outside.

Abstract: An arrangement for detecting local light irradiation in an illegal attack attempt to intentionally induce a malfunction or faulty condition is formed on a small chip occupancy area so as to provide high detection sensitivity. In a region containing a logic circuit, a plurality of series-coupled detection inverters are distributively disposed as photodetector elements having a constant logical value of primary-stage input. When at least one of the series-coupled detection inverters is irradiated with light, an output thereof is inverted, thereby producing a final output through the series-coupled detection inverters. Based on the final output thus produced, local light irradiation can be detected.

Abstract: A semiconductor device includes a CPU, an EEPROM, and a ROM. The ROM includes an encryption area and a non-encryption area and the encrypted firmware is stored in the encryption area. The semiconductor device includes a decrypter which holds the encryption key, decrypts the encrypted firmware, and supplies the decrypted firmware to the CPU. The EEPROM includes a system area to which an access from the CPU is forbidden in a user mode. The encryption key is divided into split keys of plural bit strings, and stored in the distributed address areas in the system area. An encryption key reading program which is not encrypted is stored in the non-encryption area of the ROM. Executing the encryption key reading program, the CPU reads and reconfigures plural split keys stored in the EEPROM in a distributed manner to restore the encryption key and supplies the restored encryption key to the decrypter.

Abstract: A semiconductor integrated circuit includes a logic circuit, the logic circuit including an attack detection circuit for checking multi-bit storage. The attack detection circuit includes an error determination circuit capable of detection through a logic operation such as a code theory and a light irradiation detection circuit having light detection elements, and the light detection elements are arranged so that the light irradiation detection circuit can detect errors of the number of bits beyond the detection limit of the error determination circuit. Due to error detection by the error determination circuit and light irradiation detection by the light irradiation detection circuit, the circuits complementarily detect fault attacks from outside.

Abstract: An arrangement for detecting local light irradiation in an illegal attack attempt to intentionally induce a malfunction or faulty condition is formed on a small chip occupancy area so as to provide high detection sensitivity. In a region containing a logic circuit, a plurality of series-coupled detection inverters are distributively disposed as photodetector elements having a constant logical value of primary-stage input. When at least one of the series-coupled detection inverters is irradiated with light, an output thereof is inverted, thereby producing a final output through the series-coupled detection inverters. Based on the final output thus produced, local light irradiation can be detected.

Abstract: In programming in high-level language, a method of generating a program supporting external specifications for generating secure codes having high tamper-resistance and automatically generating an executable program having tamper-resistance with regard to a portion designated by a user is provided. A syntax analysis step, an intermediate representation generation step, a register allocation step, an optimization processing step, an assembly language generation step, a machine language generation step and a machine language program linkage step are executed. And between finish of reading of the source program and generating the executable program, a tamper-resistant code insertion step of automatically generating a code having tamper-resistance coping with unjust analysis of an operation content of the executable program is executed to the source program, the intermediate representation, the assembly language program or the machine language program based on an instruction of a user.