Abstract: The present invention discloses an MPEG decoder for reproducing moving picture data. A first frame memory (FM0) and a second frame memory (FM1), each of which is composed of 2N slots, are provided. A third frame memory (FM2) is provided which is composed of N+4 slots. Each slot is provided with a memory capacity of eight lines. FM0 and FM1 each have a 1-frame memory capacity for storing reference frames for motion compensation. FM2, on the other hand, has a memory capacity of half a frame+32 lines for B-PICTURE interlace conversion. A slot control memory (SM) is further provided which is composed of 2N+6 words each of which stores a respective slot number of FM2. For an output section to read the slots of FM2 in the correct order, the contents of SM are updated by an control section at the time of the writing of FM2 by a decoding section.

Abstract: After all the data words stored in a first scan transform RAM are initialized to "0"s, only signed level data words are overwritten, based on zero runlength data words, on "0"s at the positions designated by zigzag scan addresses in the first scan transform RAM. Thus, while only non-zero components out of 8.times.8 components forming one block are written in the first scan transform RAM, a block stored in a second scan transform RAM is read and initialized. Further, while only non-zero components of the next block are written in the second scan transform RAM, the block stored in the first scan transform RAM is read and initialized. This achieves, in real time, highly efficient runlength decoding responsive to a picture element clock signal of high frequency.