Patents by Inventor Yoshiyuki Ikezawa

Yoshiyuki Ikezawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multilayer printed wiring board
    Patent number: 7457129
    Abstract: There is provided a multilayer printed wiring board including semiconductor element therewithin, which can realize high density wiring. A multilayer printed wiring board 1 includes a first printed wiring board 10 having a semiconductor element 2 mounted on a wiring pattern 12, a second printed wiring board 21 laminated on the wiring pattern 12 through a first insulating layer 20, a third printed wiring board 31 laminated on the second printed wiring board 21 through a second insulating layer 30, and a space region penetrating through the first insulating layer 20 and the second printed wiring board 21 in the thickness direction and adapted so that the semiconductor element 2 can be accommodated therewithin.
    Type: Grant
    Filed: August 27, 2007
    Date of Patent: November 25, 2008
    Assignee: Clover Electronics Co., Ltd.
    Inventors: Yoshiyuki Ikezawa, Takeshi Sunada, Tomoyasu Gunji, Katsuhiko Matsuura, Hidetoshi Hiramori, Tetsuya Yasuoka
  • Multilayer printed wiring board
    Publication number: 20080049406
    Abstract: There is provided a multilayer printed wiring board including semiconductor element therewithin, which can realize high density wiring. A multilayer printed wiring board 1 includes a first printed wiring board 10 having a semiconductor element 2 mounted on a wiring pattern 12, a second printed wiring board 21 laminated on the wiring pattern 12 through a first insulating layer 20, a third printed wiring board 31 laminated on the second printed wiring board 21 through a second insulating layer 30, and a space region penetrating through the first insulating layer 20 and the second printed wiring board 21 in the thickness direction and adapted so that the semiconductor element 2 can be accommodated therewithin.
    Type: Application
    Filed: August 27, 2007
    Publication date: February 28, 2008
    Inventors: Yoshiyuki Ikezawa, Takeshi Sunada, Tomoyasu Gunji, Katsuhiko Matsuura, Hidetoshi Hiramori, Tetsuya Yasuoka