Patents by Inventor Yoshiyuki Inomata

Yoshiyuki Inomata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5939894
    Abstract: A CMOS integrated circuit is tested by creating a database in which types of CMOS functional units of the integrated circuit are mapped to values of quiescent power supply currents which would flow through the functional units corresponding to all possible internal states of the integrated circuit. A test pattern is applied to a simulation model of the functional units of the integrated circuits and an output is detected therefrom. Corresponding to the output of the simulation model, values of the quiescent power supply currents are read from the database and a decision threshold is derived from a total sum of the read values. A power supply current of the integrated circuit is then measured while subjecting it to the test pattern and the measured current is compared with the decision threshold to produce a test result of the integrated circuit.
    Type: Grant
    Filed: October 24, 1996
    Date of Patent: August 17, 1999
    Assignee: NEC Corporation
    Inventors: Hisashi Yamauchi, Fumihiko Tajima, Yoshiyuki Inomata