Patents by Inventor Yoshiyuki Kabayashi

Yoshiyuki Kabayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030017645
    Abstract: In a step of covering a rear face resist, by recognizing position of a positioning mark exposed at a rear face of a conductive foil, position recognition of a conductive pattern of the rear face of every block or every conductive foil is performed indirectly, and a resist layer is formed except an opening portion forming the scheduled rear face electrode on the conductive pattern. Therefore, a method of manufacturing a circuit device shortened in time.
    Type: Application
    Filed: July 16, 2002
    Publication date: January 23, 2003
    Inventors: Yoshiyuki Kabayashi, Noriaki Sakamoto, Kouji Takahashi
  • Publication number: 20020192857
    Abstract: An entirely molded semiconductor apparatus in which a flexible sheet having a conductive pattern is employed as a supporting substrate and semiconductor elements are assembled thereon has been developed, wherein such a semiconductor apparatus has various problems by which no multi-layered connection structure is enabled, and warping of insulation resin sheets becomes remarkable in the fabrication process. Since a conductive plated layer 4 is formed after through holes 21 are formed in the insulation resin 2 by using an insulation resin sheet 1 overcoated on a single side of the conductive layer 3 with insulation resin 2, a multi-layer connection structure can be achieved by the second conductive path layer 6 which is connected, in multi layers, to the first conductive path layer 5 formed by etching the conductive plated layer 4.
    Type: Application
    Filed: June 14, 2002
    Publication date: December 19, 2002
    Inventors: Yusuke Igarashi, Noriaki Sakamoto, Yoshiyuki Kabayashi, Takeshi Nakamura