Abstract: The present invention provides an information recording configuration that achieves both difficulty in reading and highly accurate reading. Highly confidential additional information such as encryption key is recorded in a groove signal. During recording of the additional information, a groove signal is recorded that has an amplitude offset setting commensurate with the bit value. During reading of the additional information, a signal R0 with no offset is estimated from a signal R1 read from the groove signal for a predetermined period, after which a difference signal C=R1?R0 is calculated and integrated for each of the predetermined periods so as to determine the direction of the amplitude offset for each period. This process achieves recording and reproduction of additional information that offers enhanced difficulty in reading and highly accurate reading at the same time.

Abstract: An information recording processing constitution realizing both readout difficulty and high-precision readout is provided. Superimposition recording of highly secret additional information such as a cryptographic key in a groove signal recorded on a disk, which superimposition recording realizes both readout difficulty and high-precision readout, can be performed. The groove signal to which a phase error corresponding to a bit value is set is recorded at a time of recording of the additional information, and at a time of readout of the additional information, the phase error of the groove signal in a predetermined section is subjected to an integrating process and the direction of the phase error of the groove signal within each section is determined. The recording and reproduction of the additional information for increasing readout difficulty and realizing high-precision readout is realized by such processes.

Abstract: The present invention provides an information recording configuration that achieves both difficulty in reading and highly accurate reading. Highly confidential additional information such as encryption key is recorded in a groove signal. During recording of the additional information, a groove signal is recorded that has an amplitude offset setting commensurate with the bit value. During reading of the additional information, a signal R0 with no offset is estimated from a signal R1 read from the groove signal for a predetermined period, after which a difference signal C=R1?R0 is calculated and integrated for each of the predetermined periods so as to determine the direction of the amplitude offset for each period. This process achieves recording and reproduction of additional information that offers enhanced difficulty in reading and highly accurate reading at the same time.

Abstract: An information recording processing constitution realizing both readout difficulty and high-precision readout is provided. Superimposition recording of highly secret additional information such as a cryptographic key in a groove signal recorded on a disk, which superimposition recording realizes both readout difficulty and high-precision readout, can be performed. The groove signal to which a phase error corresponding to a bit value is set is recorded at a time of recording of the additional information, and at a time of readout of the additional information, the phase error of the groove signal in a predetermined section is subjected to an integrating process and the direction of the phase error of the groove signal within each section is determined. The recording and reproduction of the additional information for increasing readout difficulty and realizing high-precision readout is realized by such processes.

Abstract: A second-order Volterra filter has a quadratic section including a plurality of multiplication units that multiply a first input signal with a second input signal. One of the multiplication units employs a signal not delayed from the first input signal, as the second input signal. A remaining one of the multiplication units employs a signal delayed a preset time from the first input signal, as the second input signal. The one of the multiplication units includes a multiplier that multiplies the signal output from the one of the multiplication units and a signal output from each of one or more delay units, each with a preset coefficient. A step gain parameter for updating each preset coefficient of a multiplier of the remaining one of the multiplication units is twice a step gain parameter for updating each preset coefficient of the multiplier of the one of the multiplication units.

Abstract: A method determines tap coefficients of a phase interpolation finite impulse response (FIR) filter with respect to a digital-signal phase-locked loop processing apparatus including an A/D converter receiving a reproduced signal serving as digital data and sampling the received reproduced signal at a frequency higher than a data rate frequency and a PLL portion performing phase locking of the reproduced signal by filtering the sampled reproduced signal obtained by the A/D converter using the phase interpolation FIR filter and outputting a data sequence of the phase-locked reproduced signal. The method includes providing an adaptive equalization FIR filter at the data rate frequency at a stage subsequent to the PLL portion and determining the tap coefficients of the phase interpolation FIR filter using, as estimated values, FIR filter tap coefficients of the adaptive equalization FIR filter, which are converged so as to achieve a minimum mean square error.

Abstract: An adaptive equalizing apparatus that can positively remove the leading Inter Symbol Interference (ISI), make a maximum-likelihood decoding and an optimum equalization on the basis of the result of the maximum-likelihood decoding with consideration being given to the asymmetry of an input waveform. The adaptive equalizing apparatus includes a feedforward filter, a maximum-likelihood decoder, a feedback filter, a delay unit, and a subtracter. In the feedback filter, the tap factor is controlled on the basis of the binary signal generated by the maximum-likelihood decoding to generate a distortion of a partial response after the leading edge of the binary signal and an ISI response after the trailing edge. In the feedforward filter, the tap factor for the signal supplied from the subtracter is controlled to be a partial response.

Abstract: A method determines tap coefficients of a phase interpolation finite impulse response (FIR) filter with respect to a digital-signal phase-locked loop processing apparatus including an A/D converter receiving a reproduced signal serving as digital data and sampling the received reproduced signal at a frequency higher than a data rate frequency and a PLL portion performing phase locking of the reproduced signal by filtering the sampled reproduced signal obtained by the A/D converter using the phase interpolation FIR filter and outputting a data sequence of the phase-locked reproduced signal. The method includes providing an adaptive equalization FIR filter at the data rate frequency at a stage subsequent to the PLL portion and determining the tap coefficients of the phase interpolation FIR filter using, as estimated values, FIR filter tap coefficients of the adaptive equalization FIR filter, which are converged so as to achieve a minimum mean square error.

Abstract: Disclosed is a signal processing apparatus for implementing a quadratic term of a second-order Volterra filter. This signal processing apparatus (1) includes a plural number of multipliers each adapted for multiplying first and second signals. Each multiplier includes one or more series-connected delay circuits, each delaying a signal output from the multiplier, by a preset time, and one or more coefficient multipliers for multiplying a signal output from each multiplier and a signal output from each delay circuit, each by a preset coefficient. A plural number n, n being an integer not less than unity, of the multipliers are connected in parallel with one another, and a k'th multiplier, k being an integer such that 1?k?n, uses a signal, delayed from the first signal a time equal to (k?1) times by a unit time, as the second signal.

Abstract: The present invention provides an adaptive equalizing apparatus that can positively remove the leading ISI, and make a maximum-likelihood decoding and an optimum equalization on the basis of the result of the maximum-likelihood decoding with consideration being given to the asymmetry of an input waveform. The adaptive equalizing apparatus includes a feedforward filter to filter the read signal, a maximum-likelihood decoder making maximum-likelihood decoding of the signal filtered by the feedforward filter to generate the binary signal, a feedback filter to filter the binary signal supplied from the maximum-likelihood decoder, a delay unit delaying the signal filtered by the feedforward filter by a processing time of the maximum-likelihood decoder, and a subtracter subtracting the signal supplied from the feedback filter from the signal supplied from the delay unit.

Abstract: A signal processing apparatus adapted for correcting non-linear distortion of a reproduction signal includes a secondary adaptive equalizing filter connected in parallel with a primary adaptive equalizing filter to correct non-linear distortion in an analog equalized signal. Filter outputs of the primary adaptive equalizing filter and the secondary adaptive equalizing filter are added at an adder, and the added output thus obtained is delivered to a phase interpolation filter as an equalized output. The phase interpolation filter performs interpolation of phase on the basis of a filter output of the primary adaptive equalizing filter and a filter output of the secondary adaptive equalizing filter. A filter output of the phase interpolation filter is delivered to an Information Technology research-phase-locked loop circuit.