Patents by Inventor Yoshiyuki Masuo
Yoshiyuki Masuo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7919974Abstract: A handler is configured by, separably and connectably, a plurality of types of handling modules of different throughputs and a plurality of types of test modules of different numbers of simultaneous measurements and/or test temperatures. Based on the maximum number of measurable pins of the tester outputting a test pattern and examining a response pattern, the number of terminals of the DUTs, and the test time, the throughput of the handling module and the number of simultaneous measurements and/or test temperature of the test module are selected and combined.Type: GrantFiled: July 22, 2005Date of Patent: April 5, 2011Assignee: Advantest CorporationInventors: Kazuyuki Yamashita, Yoshiyuki Masuo
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Publication number: 20090189631Abstract: An air cylinder raising and lowering a pickup head for holding an IC device in an electronic device test apparatus, the air cylinder includes a cylinder tube; a piston; a first hollow chamber formed below the piston; a second hollow chamber formed above the piston and being larger than the first hollow chamber in terms of a pressure receiving area of the piston; and a rod with one end coupled with the piston and the other end coupled with the pickup head. The first hollow chamber is connected to the air feed device via a first feed system in which the air feed is secured even if the electric power supply of the electronic device test apparatus is cut off, and the second hollow chamber is connected to the air feed device via a second feed system having a shutoff valve.Type: ApplicationFiled: February 21, 2007Publication date: July 30, 2009Applicant: ADVANTEST CORPORATIONInventors: Kenichi Shimada, Yoshiyuki Masuo
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Publication number: 20090027060Abstract: An adapter able to reduce the costs of an electronic device test apparatus, the adapter having a frame member interposed, between an opening formed at a handler and a HIFIX attached to a test head and inserted in the opening for adapting the shape of the HIFIX to the shape of the opening.Type: ApplicationFiled: May 18, 2006Publication date: January 29, 2009Applicant: ADVANTEST CORPORATIONInventors: Daisuke Takano, Yoshiyuki Masuo
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Publication number: 20080074118Abstract: A translatory type actuator 503 for moving a support member 502 supporting the suction head 501 up and down between an upper stroke end and a lower stroke end; and a servo actuator 504 for lowering the support member 502 and the suction head 501 together with the translatory type actuator 503 while controlling a speed thereof in a state that the support member 502 is at the lower stroke end so as to bring the suction head 501 contact with an electronic device 2; are included. According to this pick-and-place mechanism 500, an impact load acting on an electronic device 2 at the time of picking up the electronic device 2 by the suction head 501 can be reduced as much as possible.Type: ApplicationFiled: April 7, 2005Publication date: March 27, 2008Applicant: ADVANTEST CORPORATIONInventor: Yoshiyuki Masuo
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Publication number: 20080042667Abstract: A handler is configured by, separably and connectably, a plurality of types of handling modules of different throughputs and a plurality of types of test modules of different numbers of simultaneous measurements and/or test temperatures. Based on the maximum number of measurable pins of the tester outputting a test pattern and examining a response pattern, the number of terminals of the DUTs, and the test time, the throughput of the handling module and the number of simultaneous measurements and/or test temperature of the test module are selected and combined.Type: ApplicationFiled: July 22, 2005Publication date: February 21, 2008Applicant: ADVANTEST CORPORATIONInventors: Kazuyuki Yamashita, Yoshiyuki Masuo
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Patent number: 6856128Abstract: An IC tester which is capable of reducing the time required before completion of testing on all of ICs to be tested is provided. The depth (length in the Y-axis direction) of the constant temperature chamber 4 and the exit chamber 5 is expanded by a dimension corresponding approximately to one transverse width (length of the minor edge) of the rectangular test tray 3, and two generally parallel test tray transport paths or alternatively a widened test tray transport path broad enough to transport two test trays simultaneously with the two test trays juxtaposed in a direction transverse to the widened test tray transport path are provided in the section of test tray transport path extending from the soak chamber 41 in the constant temperature chamber 4 through the testing section 42 in the constant temperature chamber 4 to the exit chamber 5 so that two test trays may be simultaneously transported along the two test tray transport paths or the widened test tray transport path.Type: GrantFiled: September 25, 2001Date of Patent: February 15, 2005Assignee: Advantest CorporationInventors: Akihiko Ito, Yoshihito Kobayashi, Yoshiyuki Masuo, Tsuyoshi Yamashita
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Patent number: 6459259Abstract: An IC tester which is capable of reducing the time required before completion of testing on all of ICs to be tested is provided. The depth (length in the Y-axis direction) of the constant temperature chamber 4 and the exit chamber 5 is expanded by a dimension corresponding approximately to one transverse width (length of the minor edge) of the rectangular test tray 3, and two generally parallel test tray transport paths or alternatively a widened test tray transport path broad enough to transport two test trays simultaneously with the two test trays juxtaposed in a direction transverse to the widened test tray transport path are provided in the section of test tray transport path extending from the soak chamber 41 in the constant temperature chamber 4 through the testing section 42 in the constant temperature chamber 4 to the exit chamber 5 so that two test trays may be simultaneously transported along the two test tray transport paths or the widened test tray transport path.Type: GrantFiled: February 26, 1999Date of Patent: October 1, 2002Assignee: Advantest CorporationInventors: Akihiko Ito, Yoshihito Kobayashi, Yoshiyuki Masuo, Tsuyoshi Yamashita
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Publication number: 20020135356Abstract: An IC tester which is capable of reducing the time required before completion of testing on all of ICs to be tested is provided. The depth (length in the Y-axis direction) of the constant temperature chamber 4 and the exit chamber 5 is expanded by a dimension corresponding approximately to one transverse width (length of the minor edge) of the rectangular test tray 3, and two generally parallel test tray transport paths or alternatively a widened test tray transport path broad enough to transport two test trays simultaneously with the two test trays juxtaposed in a direction transverse to the widened test tray transport path are provided in the section of test tray transport path extending from the soak chamber 41 in the constant temperature chamber 4 through the testing section 42 in the constant temperature chamber 4 to the exit chamber 5 so that two test trays may be simultaneously transported along the two test tray transport paths or the widened test tray transport path.Type: ApplicationFiled: February 26, 1999Publication date: September 26, 2002Inventors: AKIHIKO ITO, YOSHIHITO KOBAYASHI, YOSHIYUKI MASUO, TSUYOSHI YAMASHITA
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Patent number: 6384593Abstract: A semiconductor device testing apparatus having a reduced transverse width and compact in size is provided. Adjacent to a constant temperature chamber containing therein a vertical transport means is located a test chamber which is in turn adjoined by a temperature-stress removing chamber likewise containing therein a vertical transport means, so that the constant temperature chamber and the test chamber are arranged transversely in a line, while the temperature-stress removing chamber is located in front of the test chamber when viewed in front view of the apparatus. Further, a loader section is located in front of the constant temperature chamber, and an unloader section is located above the temperature-stress removing chamber. With this arrangement, the transverse width of the testing apparatus may be reduced to about two test tray lengths.Type: GrantFiled: June 16, 2000Date of Patent: May 7, 2002Assignee: Advantest CorporationInventors: Yoshihito Kobayashi, Tsuyoshi Yamashita, Hiroto Nakamura, Shin Nemoto, Yoshiyuki Masuo, Akihiko Ito
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Patent number: 6384360Abstract: A pad 1051, air cylinder 1052, cylinder control valve 1053, vacuum generator 1054, feed valve 1055, break valve 1056, and pressure sensor 1057 are assembled together to form an IC pickup 105d.Type: GrantFiled: June 11, 1999Date of Patent: May 7, 2002Assignee: Advantest CorporationInventors: Yoshiyuki Masuo, Yoshihito Kobayashi
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Publication number: 20020011836Abstract: An IC tester which is capable of reducing the time required before completion of testing on all of ICs to be tested is provided. The depth (length in the Y-axis direction) of the constant temperature chamber 4 and the exit chamber 5 is expanded by a dimension corresponding approximately to one transverse width (length of the minor edge) of the rectangular test tray 3, and two generally parallel test tray transport paths or alternatively a widened test tray transport path broad enough to transport two test trays simultaneously with the two test trays juxtaposed in a direction transverse to the widened test tray transport path are provided in the section of test tray transport path extending from the soak chamber 41 in the constant temperature chamber 4 through the testing section 42 in the constant temperature chamber 4 to the exit chamber 5 so that two test trays may be simultaneously transported along the two test tray transport paths or the widened test tray transport path.Type: ApplicationFiled: September 25, 2001Publication date: January 31, 2002Inventors: Akihiko Ito, Yoshihito Kobayashi, Yoshiyuki Masuo, Tsuyoshi Yamashita
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Patent number: 6104183Abstract: A semiconductor device testing apparatus having a reduced transverse width and compact in size is provided. Adjacent to a constant temperature chamber 101 containing therein a vertical transport means is located a test chamber 102 which is in turn adjoined by a temperature-stress removing chamber 103 likewise containing therein a vertical transport means, so that the constant temperature chamber 101, the test chamber 102 and the temperature-stress removing chamber 103 are arranged transversely in a line. Further, a loader section 300 is located in front of the constant temperature chamber, and an unloader section 400 is located in front of the test chamber and the temperature-stress removing chamber. With this arrangement, the transverse width of the testing apparatus may be reduced to about three test tray lengths.Type: GrantFiled: May 28, 1997Date of Patent: August 15, 2000Assignee: Advantest CorporationInventors: Yoshihito Kobayashi, Tsuyoshi Yamashita, Hiroto Nakamura, Shin Nemoto, Yoshiyuki Masuo, Akihiko Ito
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Patent number: D442568Type: GrantFiled: March 20, 2000Date of Patent: May 22, 2001Assignee: advantest CorporationInventors: Yoshiyuki Masuo, Toshiyuki Kiyokawa, Hiroyuki Takahashi