Patents by Inventor Yoshiyuki Miyase
Yoshiyuki Miyase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6452219Abstract: An IGBT having a buffer layer for shortening the turn-off time and for preventing the latching up is improved. The buffer layer of the present invention is not bare at the edge of a diced cross-section of the IGBT chip. According to this construction, a withstanding voltage between a semiconductor substrate and the buffer layer is lower than the withstand voltage of the pn junction at the edge of the diced cross-section. Therefore, the whole pn junction between the semiconductor substrate and the buffer layer, which has wide area, breaks down, as a result, energy caused by a negative voltage is absorbed, and the withstanding voltage against the negative voltage is improved.Type: GrantFiled: August 26, 1997Date of Patent: September 17, 2002Assignee: Denso CorporationInventors: Yoshiyuki Miyase, Naohito Kato, Haruo Kawakita, Naoto Okabe
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Patent number: 5729893Abstract: A method for producing a multilayer ceramic circuit substrate having therein internal conductor patterns comprising W and/or Mo as a main component and surface conductor patterns comprising Cu as a main component formed onto a surface layer of the multilayer ceramic circuit substrate, wherein an intermediate metal layer comprising 40 to 90 wt. % of W and/or Mo and 10 to 60 wt. % of at least one element selected from the group consisting of Ir, Pt, Ti, and Cr is formed in through-holes of the surface layer and on parts of the surface layer in the vicinity of the through holes on the surface layer, whereby the internal conductor patterns and the surface conductor patterns are electrically connected through the intermediate metal layer. The alumina multilayer ceramic circuit substrate enables an excellent bonding strength and electrical conductivity between the internal conductors and the surface conductors and high precision wiring and miniaturization of an electronic circuit part.Type: GrantFiled: November 22, 1995Date of Patent: March 24, 1998Assignee: Sumitomo Metal (SMI) Electronics Devices, Inc.Inventors: Nozomi Tanifuji, Akihiko Naito, Koji Sawada, Tohru Nomura, Yoshiyuki Miyase, Takashi Nagasaka
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Patent number: 5709927Abstract: A thick film circuit board comprising an insulating substrate; conductor wiring layers of a conductive material containing an oxide and formed on the insulating substrate by printing and firing; a resistance layer of a resistive material having a selected sheet resistance, being chemically reactive with the oxide, and formed between and bridging the conductor wiring layers by printing and firing; and a conductive barrier layer interposed between each of the conductor wiring layers and the resistance layer to prevent chemical reaction between the oxide of the conductor wiring layers and the resistive material of the resistance layer.Type: GrantFiled: March 29, 1996Date of Patent: January 20, 1998Assignees: Nippondenso Co., Ltd., Sumitomo Metal Ceramics Inc.Inventors: Yoshiyuki Miyase, Tohru Nomura, Akihiko Naito, Takamasa Okumura
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Patent number: 5627344Abstract: A multilayer ceramic circuit substrate having therein internal conductor patterns comprising W and/or Mo as a main component and surface conductor patterns comprising Cu as a main component formed onto a surface layer of the multilayer ceramic circuit substrate, wherein an intermediate metal layer comprising 40 to 90 wt. % of W and/or Mo and 10 to 60 wt. % of at least one element selected from the group consisting of Ir, Pt, Ti, and Cr is formed in through-holes of the surface layer and on parts of the surface layer in the vicinity of the through holes on the surface layer, whereby the internal conductor patterns and the surface conductor patterns are electrically connected through the intermediate metal layer. The alumina multilayer ceramic circuit substrate provides an excellent bonding strength and electrical conductivity between the internal conductors and the surface conductors and enables high precision wiring and miniaturization of an electronic circuit part.Type: GrantFiled: December 22, 1994Date of Patent: May 6, 1997Assignees: Sumitomo Metal Ceramics Inc., Nippondenso Co., Ltd.Inventors: Nozomi Tanifuji, Akihiko Naito, Koji Sawada, Tohru Nomura, Yoshiyuki Miyase, Takashi Nagasaka
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Patent number: 5343014Abstract: The present invention is to provide a method for laser welding different kinds of metals by which at least two types of metal members having mutually different laser reflection factor, are put one upon another and welded when the metal members are irradiated with lasers emitted in the superposed direction, comprising a process to put the first metal member on the second metal member, wherein the first metal member has a first laser reflection factor and the second metal member has a second laser reflection factor which is lower than that of the aforementioned first laser reflection factor, and the first and the second metal member are put one upon another through a metal layer and when irradiated with lasers, the aforementioned metal layer is more difficult to melt than the aforementioned second metal member. The method of the present invention further comprises a process in which lasers are irradiated from the aforementioned first metal member side.Type: GrantFiled: March 12, 1992Date of Patent: August 30, 1994Assignee: Nippondenso Co., Ltd.Inventors: Akihiko Ogino, Yoshiyuki Miyase, Shuuzi Sakou, Shinzi Shibata
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Patent number: 5156903Abstract: A multilayer ceramic substrate having improved mechanical and electrical properties and suitable for use to form a hybrid integrated circuit and a process for the manufacture thereof. The multilayer ceramic substrate has at least one layer of a first conductor based on a refractory metal as an internal conductor layer and at least one layer of a Cu-based second conductor as a surface conductor layer, wherein the second conductor layer is connected to the first conductor layer through a metallic layer formed by coating with a metalloorganics paste containing one or more metals selected from the group consisting of Pt, Pd, Ni, Cu, Au, Rh, Ru, Re, Co, and Ir followed by firing in an inert or reducing atmosphere.Type: GrantFiled: December 21, 1990Date of Patent: October 20, 1992Assignees: Sumitomo Metal Ceramics Inc., Nippon Denso Co., Ltd.Inventors: Takamasa Okumura, Kohmei Kawaguchi, Masataka Aoki, Takashi Nagasaka, Tohru Nomura, Yoshiyuki Miyase
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Patent number: 4994880Abstract: Base regions of first and second stage transistors are formed in a semiconductor substrate consisting of low and high resistivity collector layers, and emitter regions are formed in the respective base regions. The emitter region of the second stage transistor has an interdigital structure with a plurality of finger portions, and an emitter surface electrode is formed on the emitter region of the second stage transistor. The second stage transistor emitter surface electrode has an extending portion at a position spaced apart from a transistor operation region where the finger portions are formed. An emitter connection electrode is formed on the extending portion, and a lead is connected by soldering or the like to the emitter connection electrode.Type: GrantFiled: September 25, 1989Date of Patent: February 19, 1991Assignee: Nippondenso Co., Ltd.Inventors: Naohito Kato, Yoshiyuki Miyase, Tomoatsu Makino, Kasuhiro Yamada, Masami Yamaoka, Takeshi Matsui, Masahiro Yamamoto, Yoshiki Ishida, Tohru Nomura
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Patent number: 4658788Abstract: In an ignition system for an internal combustion engine, a signal generator generates a given ac signal in synchronism with the rotation of the engine and a waveform reshaping circuit reshapes the waveform of the ac signal from the signal generator thus generating a pulse signal. An ignition timing control circuit is responsive to the pulse signal from the waveform reshaping circuit to control the timing of ignition of an ignition coil in which a primary current is switched on and off in accordance with the pulse signal.Type: GrantFiled: December 18, 1985Date of Patent: April 21, 1987Assignee: Nippondenso Co., Ltd.Inventors: Noboru Yamamoto, Katsuhisa Mase, Motoshi Kawai, Yoshiyuki Miyase, Takeshi Matsui
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Patent number: 4649888Abstract: In an apparatus for controlling the energization time of an ignition coil of an internal combustion engine, a desired ignition timing is computed in accordance with a load and rotation speed of the engine and an energization starting time of the ignition coil is computed in accordance with the ignition timing. The energization starting time is retarded in accordance with the primary current through the ignition coil and the energization time of the ignition coil is reduced. The primary current flow through the ignition coil is interrupted at the ignition timing.Type: GrantFiled: April 15, 1985Date of Patent: March 17, 1987Assignee: Nippondenso Co., Ltd.Inventors: Motoshi Kawai, Noboru Yamamoto, Katuhisa Mase, Takeshi Matsui, Tomoatsu Mikino, Yoshiyuki Miyase, Ryoichi Okuda, Koichi Suzumura