Abstract: A method for fabricating a chip carrier, such as a printed circuit board, which includes at least one through hole or via hole, is disclosed. In accordance with this method, an electrically conductive layer is formed on at least one of the major surfaces of the corresponding chip carrier substrate, as well as for the surface of the through hole or via hole. Significantly, the electrically conductive layer on the at least one major surface is relatively thin, which permits the formation of a relatively high density of circuit lines in this layer. On the other hand, the electrically conductive layer on the surface of the through hole or via hole is relatively thick, which prevents the formation of defects in this layer.

Abstract: A method of preventing the occurrence of side etch in a wet etching method to form a circuit layer which meets the requirement of a high circuit density. First, etching is partially done using etchant having a relatively high etching rate with a spray pressure of a relatively small value, then etching is carried out using a second etchant having a relatively low etching rate with a high spray pressure. In an optional finishing step, etchant containing abrasive is used.