Patents by Inventor Yoshiyuki Nakagomi

Yoshiyuki Nakagomi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7486050
    Abstract: A first voltage source terminal, to which a first voltage is input, is connected to a maximum voltage terminal of serially-connected secondary batteries to be monitored. A second voltage source terminal, to which a second voltage is input, is connected to a minimum voltage terminal of the secondary batteries. A battery-voltage detecting unit outputs a detection signal based on a result of a voltage monitoring. A first reference-voltage generating unit receives the first and the second voltages as operating voltages, and generates a first reference voltage. A voltage converting unit receives the detection signal, and converts the detection signal received into either the first reference voltage or the second voltage. An output terminal outputs the detection signal converted, as an output detection signal.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: February 3, 2009
    Assignees: Renesas Technology Corp., Yashima Denki Co., Ltd.
    Inventors: Takao Hidaka, Yoshiyuki Nakagomi
  • Patent number: 7248020
    Abstract: A first voltage source terminal, to which a first voltage is input, is connected to a maximum voltage terminal of serially-connected secondary batteries to be monitored. A second voltage source terminal, to which a second voltage is input, is connected to a minimum voltage terminal of the secondary batteries. A battery-voltage detecting unit outputs a detection signal based on a result of a voltage monitoring. A first reference-voltage generating unit receives the first and the second voltages as operating voltages, and generates a first reference voltage. A voltage converting unit receives the detection signal, and converts the detection signal received into either the first reference voltage or the second voltage. An output terminal outputs the detection signal converted, as an output detection signal.
    Type: Grant
    Filed: July 12, 2005
    Date of Patent: July 24, 2007
    Assignees: Renesas Technology Corp., Yashima Denki Co., Ltd.
    Inventors: Takao Hidaka, Yoshiyuki Nakagomi
  • Publication number: 20070145951
    Abstract: A first voltage source terminal, to which a first voltage is input, is connected to a maximum voltage terminal of serially-connected secondary batteries to be monitored. A second voltage source terminal, to which a second voltage is input, is connected to a minimum voltage terminal of the secondary batteries. A battery-voltage detecting unit outputs a detection signal based on a result of a voltage monitoring. A first reference-voltage generating unit receives the first and the second voltages as operating voltages, and generates a first reference voltage. A voltage converting unit receives the detection signal, and converts the detection signal received into either the first reference voltage or the second voltage. An output terminal outputs the detection signal converted, as an output detection signal.
    Type: Application
    Filed: February 20, 2007
    Publication date: June 28, 2007
    Applicants: RENESAS TECHNOLOGY CORP., YASHIMA DENKI CO., LTD.
    Inventors: Takao Hidaka, Yoshiyuki Nakagomi
  • Publication number: 20060012337
    Abstract: A first voltage source terminal, to which a first voltage is input, is connected to a maximum voltage terminal of serially-connected secondary batteries to be monitored. A second voltage source terminal, to which a second voltage is input, is connected to a minimum voltage terminal of the secondary batteries. A battery-voltage detecting unit outputs a detection signal based on a result of a voltage monitoring. A first reference-voltage generating unit receives the first and the second voltages as operating voltages, and generates a first reference voltage. A voltage converting unit receives the detection signal, and converts the detection signal received into either the first reference voltage or the second voltage. An output terminal outputs the detection signal converted, as an output detection signal.
    Type: Application
    Filed: July 12, 2005
    Publication date: January 19, 2006
    Inventors: Takao Hidaka, Yoshiyuki Nakagomi
  • Patent number: 4738910
    Abstract: A photoresist process which comprises a process for spin-coating a substrate with a resist, a process for transferring a mask pattern onto the coated resist film followed by exposure, and a developing process for forming a pattern on the substrate after the pattern has been exposed. When the developed pattern of the resist pulsates with the increase or decrease of parameters in the process for applying resist, the value of the parameter is set to a value that corresponds to an extreme value of the pulsation.
    Type: Grant
    Filed: June 10, 1986
    Date of Patent: April 19, 1988
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuo Ito, Masaya Tanuma, Yoshiyuki Nakagomi, Kazuya Kadota, Kazunari Kobayashi
  • Patent number: 4071778
    Abstract: An analog operation circuit using a lateral transistor element having an emitter region, a base region disposed adjacent to and around the emitter region, a first collector region disposed in the base region adjacent to the emitter region through part of the base region, and a second collector region disposed outside the first collector region to surround the outside of the first collector region through part of the base region. The circuit comprises a first input means for applying a first input signal to the base of the transistor element, a second input means for applying a second input signal to the first collector of the transistor element, an output means derived from the second collector of the transistor element, and a bias means connected to the first collector for applying such a bias voltage that makes the transistor element operate in the saturation region.
    Type: Grant
    Filed: July 13, 1976
    Date of Patent: January 31, 1978
    Assignee: Hitachi, Ltd.
    Inventor: Yoshiyuki Nakagomi
  • Patent number: 3990018
    Abstract: In a transistor differential amplifier circuit wherein first and second lateral transistors are connected as loads between respective collectors of a pair of differential amplification transistors and a first power supply terminal, a common emitter of the amplifying transistors is connected to a second power supply terminal through common impedance means, the first lateral transistor is made a multicollector structure, and an output is derived from only one collector of the first lateral transistor, the improvement comprising the fact that the second lateral transistor is also made a multicollector structure and that a collector of the second lateral transistor as corresponds to the aforecited output collector of the first lateral transistor is connected to the second power supply terminal.
    Type: Grant
    Filed: September 10, 1975
    Date of Patent: November 2, 1976
    Assignee: Hitachi, Ltd.
    Inventor: Yoshiyuki Nakagomi