Patents by Inventor Yoshiyuki Ohno
Yoshiyuki Ohno has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230110355Abstract: The specification unit 3 specifies a description part of an arithmetic expression that represents loop processing from an input source program. The generation unit 4 generates arithmetic expressions that represent executing, when a remainder when dividing the number of looping times of the loop processing by a designated unroll stage number is other than 0, processing of one loop with a sum of the remainder and the designated unroll stage number as a unroll stage number, and executing loop processing with the designated unroll stage number after the processing of one loop. The replacement unit 5 replaces the arithmetic expression of the description part specified by the specification unit 3 with the arithmetic expressions generated by the generation unit 4.Type: ApplicationFiled: February 14, 2020Publication date: April 13, 2023Applicant: NEC CorporationInventor: Yoshiyuki OHNO
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Patent number: 11580193Abstract: A computation device includes: a list generation unit that generates a list indicating element values of first elements comprised in a plurality of computational matrices having equal numbers of rows and columns, the element values being indicated for the respective positions of the first elements in the computational matrices; and a computation execution unit that carries out computation based on the element values of the first elements indicated in the list and the element values of second elements comprised in a partial matrix belonging to a computation target matrix and having the same number of rows and columns as the computational matrices.Type: GrantFiled: March 16, 2018Date of Patent: February 14, 2023Assignee: NEC CORPORATIONInventor: Yoshiyuki Ohno
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Publication number: 20220253313Abstract: A program conversion device 20 for converting source code that is the generation source of an object program executed by a vector processor, the vector processor including a vector arithmetic unit that performs vector arithmetic, a scalar arithmetic unit that performs scalar arithmetic, and a shared memory that can be accessed by either of the vector arithmetic unit and the scalar arithmetic unit, the program conversion device 20 includes a conversion unit 21 which converts the source code so that: the vector arithmetic unit is caused to copy a plurality of data, which are stored in separate areas within the shared memory accessed by the scalar arithmetic unit during the process indicated by the source code, to a single different area from the areas in the shared memory; and the scalar arithmetic unit is caused to access the single different area instead of the separate areas.Type: ApplicationFiled: June 14, 2019Publication date: August 11, 2022Inventor: Yoshiyuki OHNO
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Publication number: 20220100925Abstract: An optimization apparatus 1 includes: a division unit 2 that divides a total vector length into divided vector lengths that are equal to or shorter than a maximum vector length so that the computation efficiency becomes equal to or higher than a predetermined value in vector computation to be executed by a vector computation processor; and a generation unit 3 that generates a code to be used in the vector computation based on the divided vector lengths.Type: ApplicationFiled: January 18, 2019Publication date: March 31, 2022Applicant: NEC CorporationInventor: Yoshiyuki OHNO
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Publication number: 20200117701Abstract: A computation device includes: a list generation unit that generates a list indicating element values of first elements comprised in a plurality of computational matrices having equal numbers of rows and columns, the element values being indicated for the respective positions of the first elements in the computational matrices; and a computation execution unit that carries out computation based on the element values of the first elements indicated in the list and the element values of second elements comprised in a partial matrix belonging to a computation target matrix and having the same number of rows and columns as the computational matrices.Type: ApplicationFiled: March 16, 2018Publication date: April 16, 2020Applicant: NEC CorporationInventor: Yoshiyuki OHNO
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Patent number: 10572233Abstract: Provided is a vectorization device 30 comprising: a unit 31 that detects a configuration in which the inner loop length depends on the outer loop variable, and in which a first array indicating the results of dual-loop processing does not contain the inner loop variable as an index value; an unit 32 that, when the configuration is detected, determines a fixed value as the inner loop length; an unit 33 that expands the array size of a second array used in the calculation of the first array value, and thereby enables dual-loop processing of the inner loop; an unit 34 that sets an element value for an added element of the second array, and thereby, before and after such processing is carried out, enables the results of the dual-loop processing to be made equal; and an unit 35 that updates the software on the basis of such processing results.Type: GrantFiled: November 17, 2016Date of Patent: February 25, 2020Assignee: NEC CORPORATIONInventor: Yoshiyuki Ohno
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Publication number: 20190056920Abstract: Provided is a vectorization device 30 comprising: a unit 31 that detects a configuration in which the inner loop length depends on the outer loop variable, and in which a first array indicating the results of dual-loop processing does not contain the inner loop variable as an index value; an unit 32 that, when the configuration is detected, determines a fixed value as the inner loop length; an unit 33 that expands the array size of a second array used in the calculation of the first array value, and thereby enables dual-loop processing of the inner loop; an unit 34 that sets an element value for an added element of the second array, and thereby, before and after such processing is carried out, enables the results of the dual-loop processing to be made equal; and an unit 35 that updates the software on the basis of such processing results.Type: ApplicationFiled: November 17, 2016Publication date: February 21, 2019Applicant: NEC CorporationInventor: Yoshiyuki OHNO
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Patent number: 9201707Abstract: A distributed system includes: a plurality of ordinary nodes provided with reduced-power states having different times of recovery to a normal operating state; and a management node for assigning a job to an ordinary node for carrying out the job. The management node has: node select means for selecting an ordinary node from ordinary nodes each put in one of the reduced-power states, assigning a job to the selected ordinary node and driving the selected ordinary node to carry out the assigned job; and node control means for executing control to restore an ordinary node selected by the node select means to the normal operating state. The node select means selects an ordinary node from the ordinary nodes each put in one of the reduced-power states having different times of recovery to the normal operating state in accordance with an ordinary-node order starting with an ordinary node existing in a reduced-power state and having a short time of recovery to the normal operating state.Type: GrantFiled: January 31, 2012Date of Patent: December 1, 2015Assignee: NEC CORPORATIONInventors: Yoshiyuki Ohno, Dai Kobayashi, Masaki Kan
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Patent number: 8792488Abstract: A network switch that outputs multicast packets from a plurality of output ports correlated with a plurality of input ports. A multicast control section designates an input port that has received a route setup command and an output port that outputs the route setup command to be transferred to a destination designated by the route setup command as ports that output the multicast packets. In multicast communications, the multicast packets are transferred to ports other than the input port that has received the multicast packets of the ports designated by a multicast section as those that output the multicast packet.Type: GrantFiled: March 10, 2010Date of Patent: July 29, 2014Assignee: NEC CorporationInventor: Yoshiyuki Ohno
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Publication number: 20130312004Abstract: A distributed system includes: a plurality of ordinary nodes provided with reduced-power states having different times of recovery to a normal operating state; and a management node for assigning a job to an ordinary node for carrying out the job. The management node has: node select means for selecting an ordinary node from ordinary nodes each put in one of the reduced-power states, assigning a job to the selected ordinary node and driving the selected ordinary node to carry out the assigned job; and node control means for executing control to restore an ordinary node selected by the node select means to the normal operating state. The node select means selects an ordinary node from the ordinary nodes each put in one of the reduced-power states having different times of recovery to the normal operating state in accordance with an ordinary-node order starting with an ordinary node existing in a reduced-power state and having a short time of recovery to the normal operating state.Type: ApplicationFiled: January 31, 2012Publication date: November 21, 2013Applicant: NEC CORPORATIONInventors: Yoshiyuki Ohno, Dai Kobayashi, Masaki Kan
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Publication number: 20120020356Abstract: A network switch that outputs multicast packets from a plurality of output ports correlated with a plurality of input ports. A multicast control section designates an input port that has received a route setup command and an output port that outputs the route setup command to be transferred to a destination designated by the route setup command as ports that output the multicast packets. In multicast communications, the multicast packets are transferred to ports other than the input port that has received the multicast packets of the ports designated by a multicast section as those that output the multicast packet.Type: ApplicationFiled: March 10, 2010Publication date: January 26, 2012Inventor: Yoshiyuki Ohno