Patents by Inventor Yoshiyuki Takegawa
Yoshiyuki Takegawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11852316Abstract: A construction component forms at least a part of a structure that faces a target space. The construction component has a first function, a second function, and a third function. The first function is a function of emitting illumination light toward the target space. The second function is a function of allowing incident light to enter the construction component. The incident light is emitted from a light source disposed out of a projection area, viewed from the target space, of the construction component and is incident on the construction component via a light transmission member. The third function is a function of converting the incident light into the illumination light.Type: GrantFiled: March 16, 2021Date of Patent: December 26, 2023Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Hiroshi Kitano, Kenichiro Tanaka, Takanori Aketa, Yoshiyuki Takegawa, Satoshi Hyodo
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Publication number: 20230151936Abstract: A construction component forms at least a part of a structure that faces a target space. The construction component has a first function, a second function, and a third function. The first function is a function of emitting illumination light toward the target space. The second function is a function of allowing incident light to enter the construction component. The incident light is emitted from a light source disposed out of a projection area, viewed from the target space, of the construction component and is incident on the construction component via a light transmission member. The third function is a function of converting the incident light into the illumination light.Type: ApplicationFiled: March 16, 2021Publication date: May 18, 2023Inventors: Hiroshi KITANO, Kenichiro TANAKA, Takanori AKETA, Yoshiyuki TAKEGAWA, Satoshi HYODO
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Patent number: 8080869Abstract: A wafer level package structure, in which a plurality of compact sensor devices with small variations in sensor characteristics are formed, and a method of producing the same are provided. This package structure has a semiconductor wafer having plural sensor units, and a package wafer bonded to the semiconductor wafer. The semiconductor wafer has a first metal layer formed with respect to each of the sensor units. The package wafer has a bonding metal layer at a position facing the first metal layer. Since a bonding portion between the semiconductor wafer and the package wafer is formed at room temperature by a direct bonding between activated surfaces of the first metal layer and the bonding metal layer, it is possible to prevent that variations in sensor characteristics occur due to residual stress at the bonding portion.Type: GrantFiled: November 24, 2006Date of Patent: December 20, 2011Assignee: Panasonic Electric Works Co., Ltd.Inventors: Takafumi Okudo, Yuji Suzuki, Yoshiyuki Takegawa, Toru Baba, Kouji Gotou, Hisakazu Miyajima, Kazushi Kataoka, Takashi Saijo
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Patent number: 8067769Abstract: A wafer level package structure with a plurality of compact sensors such as acceleration sensors and gyro sensors is provided. This package structure is composed of a semiconductor wafer with plural sensor units, and a pair of package wafers bonded to both surfaces of the semiconductor wafer. Each of the sensor units has a frame having an opening, a movable portion held in the opening to be movable relative to the frame, and a detecting portion for outputting an electric signal according to a positional displacement of the movable portion. Since the semiconductor wafer is bonded to each of the package wafers by a solid-phase direct bonding without diffusion between a surface-activated region formed on the frame and a surface-activated region formed on the package wafer, it is possible to prevent that variations in sensor characteristics occur due to residual stress at the bonding interface.Type: GrantFiled: November 24, 2006Date of Patent: November 29, 2011Assignee: Panasonic Electric Works Co., Ltd.Inventors: Takafumi Okudo, Yuji Suzuki, Yoshiyuki Takegawa, Toru Baba, Kouji Gotou, Hisakazu Miyajima, Kazushi Kataoka, Takashi Saijo
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Patent number: 8026594Abstract: A sensor device having small variations in sensor characteristics and improved resistance to electrical noise is provided. This sensor device has a sensor unit, which is provided with a frame having an opening, a movable portion held in the opening to be movable relative to the frame, and a detecting portion for outputting an electric signal according to a positional displacement of the movable portion, and a package substrate made of a semiconductor material, and bonded to a surface of the sensor unit. The package substrate has an electrical insulating film on a surface facing the sensor unit. The package substrate is bonded to the sensor unit by forming a direct bonding between an activated surface of the electrical insulating film and an activated surface of the sensor unit at room temperature.Type: GrantFiled: November 24, 2006Date of Patent: September 27, 2011Assignee: Panasonic Electric Works Co., Ltd.Inventors: Takafumi Okudo, Yuji Suzuki, Yoshiyuki Takegawa, Toru Baba, Kouji Gotou, Hisakazu Miyajima, Kazushi Kataoka, Takashi Saijo
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Patent number: 7674638Abstract: A compact sensor device having stable sensor characteristics and the production method are provided. The sensor device is formed with a sensor substrate and a pair of package substrates bonded to both surface of the sensor substrate. The sensor substrate has a frame with an opening, a movable portion held in the opening to be movable relative to the frame, and a detecting portion for outputting an electric signal according to a positional displacement of the movable portion. Surface-activated regions are formed on the frame of the sensor substrate and the package substrates by use of an atomic beam, an ion beam or a plasma of an inert gas. By forming a direct bonding between the surface-activated regions of the sensor substrate and each of the package substrates at room temperature, it is possible to avoid inconvenience resulting from residual stress at the bonding portion.Type: GrantFiled: November 24, 2006Date of Patent: March 9, 2010Assignee: Panasonic Electric Works Co., Ltd.Inventors: Takafumi Okudo, Yuji Suzuki, Yoshiyuki Takegawa, Toru Baba, Kouji Gotou, Hisakazu Miyajima, Kazushi Kataoka, Takashi Saijo
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Publication number: 20090267165Abstract: A wafer level package structure with a plurality of compact sensors such as acceleration sensors and gyro sensors is provided. This package structure is composed of a semiconductor wafer with plural sensor units, and a pair of package wafers bonded to both surfaces of the semiconductor wafer. Each of the sensor units has a frame having an opening, a movable portion held in the opening to be movable relative to the frame, and a detecting portion for outputting an electric signal according to a positional displacement of the movable portion. Since the semiconductor wafer is bonded to each of the package wafers by a solid-phase direct bonding without diffusion between a surface-activated region formed on the frame and a surface-activated region formed on the package wafer, it is possible to prevent that variations in sensor characteristics occur due to residual stress at the bonding interface.Type: ApplicationFiled: November 24, 2006Publication date: October 29, 2009Inventors: Takafumi Okudo, Yuji Suzuki, Yoshiyuki Takegawa, Toru Baba, Kouji Gotou, Hisakazu Miyajima, Kazushi Kataoka, Takashi Saijo
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Publication number: 20090236678Abstract: A sensor device having small variations in sensor characteristics and improved resistance to electrical noise is provided. This sensor device has a sensor unit, which is provided with a frame having an opening, a movable portion held in the opening to be movable relative to the frame, and a detecting portion for outputting an electric signal according to a positional displacement of the movable portion, and a package substrate made of a semiconductor material, and bonded to a surface of the sensor unit. The package substrate has an electrical insulating film on a surface facing the sensor unit. The package substrate is bonded to the sensor unit by forming a direct bonding between an activated surface of the electrical insulating film and an activated surface of the sensor unit at room temperature.Type: ApplicationFiled: November 24, 2006Publication date: September 24, 2009Inventors: Takafumi Okudo, Yuji Suzuki, Yoshiyuki Takegawa, Toru Baba, Kouji Gotou, Hisakazu Miyajima, Kazushi Kataoka, Takashi Saijo
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Publication number: 20090159997Abstract: A wafer level package structure, in which a plurality of compact sensor devices with small variations in sensor characteristics are formed, and a method of producing the same are provided. This package structure has a semiconductor wafer having plural sensor units, and a package wafer bonded to the semiconductor wafer. The semiconductor wafer has a first metal layer formed with respect to each of the sensor units. The package wafer has a bonding metal layer at a position facing the first metal layer. Since a bonding portion between the semiconductor wafer and the package wafer is formed at room temperature by a direct bonding between activated surfaces of the first metal layer and the bonding metal layer, it is possible to prevent that variations in sensor characteristics occur due to residual stress at the bonding portion.Type: ApplicationFiled: November 24, 2006Publication date: June 25, 2009Inventors: Takafumi Okudo, Yuji Suzuki, Yoshiyuki Takegawa, Toru Baba, Kouji Gotou, Hisakazu Miyajima, Kazushi Kataoka, Takashi Saijo
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Publication number: 20090152656Abstract: A compact sensor device having stable sensor characteristics and the production method are provided. The sensor device is formed with a sensor substrate and a pair of package substrates bonded to both surface of the sensor substrate. The sensor substrate has a frame with an opening, a movable portion held in the opening to be movable relative to the frame, and a detecting portion for outputting an electric signal according to a positional displacement of the movable portion. Surface-activated regions are formed on the frame of the sensor substrate and the package substrates by use of an atomic beam, an ion beam or a plasma of an inert gas. By forming a direct bonding between the surface-activated regions of the sensor substrate and each of the package substrates at room temperature, it is possible to avoid inconvenience resulting from residual stress at the bonding portion.Type: ApplicationFiled: November 24, 2006Publication date: June 18, 2009Inventors: Takafumi Okudo, Yuji Suzuki, Yoshiyuki Takegawa, Toru Baba, Kouji Gotou, Hisakazu Miyajima, Kazushi Kataoka, Takashi Saijo
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Patent number: 6844664Abstract: In a field emission-type electron source (10), a strong field drift layer (6) and a surface electrode (7) consisting of a gold thin film are provided on an n-type silicon substrate (1). An ohmic electrode (2) is provided on the back surface of the n-type silicon substrate (1). A direct current voltage is applied so that the surface electrode (7) becomes positive in potential relevant to the ohmic electrode (2). In this manner, electrons injected from the ohmic electrode (2) into the strong field drift layer (6) via the n-type silicon substrate (6) drift in the strong field drift layer (6), and is emitted to the outside via the surface electrode (7).Type: GrantFiled: April 24, 2002Date of Patent: January 18, 2005Assignee: Matsushita Electric Works, Ltd.Inventors: Takuya Komoda, Koichi Aizawa, Yoshiaki Honda, Tsutomu Ichihara, Yoshifumi Watabe, Takashi Hatai, Toru Baba, Yoshiyuki Takegawa
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Patent number: 6784621Abstract: An electron source (10) has an electron source element (10a) including a lower electrode (12), a drift layer (6) and a surface electrode (7). The drift layer (6) is interposed between the lower electrode (12) and the surface electrode (7). When a certain voltage is applied between the surface electrode (7) and the lower electrode (12) such that the surface electrode (7) has a higher potential than that of the lower electrode (12), a resultingly induced electric field allows electrons to pass through the drift layer (6) and then the electrons are emitted through the surface electrode (7). When a forward-bias voltage is applied between the surface electrode (7) and the lower electrode (12), a reverse-bias voltage is applied after the forward-bias voltage has been applied to release out of the drift layer (6) an electron captured by a trap (9) in the drift layer (6).Type: GrantFiled: October 28, 2002Date of Patent: August 31, 2004Assignee: Matsushita Electric Works, Ltd.Inventors: Takuya Komoda, Tsutomu Ichihara, Koichi Aizawa, Yoshiaki Honda, Yoshifumi Watabe, Takashi Hatai, Yoshiyuki Takegawa, Toru Baba
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Patent number: 6720717Abstract: A lower electrode (2) and surface electrode (7) composed of a layer-structured conductive carbide layer is formed on one principal surface side of the substrate (1) composed of an insulative substrate such as a glass or ceramic substrate. A non-doped polycrystalline silicon layer (3) is formed on the lower electrode (2). An electron transit layer (6) composed of an oxidized porous polycrystalline silicon is formed on the polycrystalline silicon layer (3). The electron transit layer (6) is composed of a composite nanocrystal layer including polycrystalline silicon and many nanocrystalline silicons residing adjacent to a grain boundary of the polycrystalline silicon. When voltage is applied between the lower electrode (2) and the surface electrode (7) such that the surface electrode (7) has a higher potential, electrons are injected from the lower electrode (2) toward the surface electrode (7), and emitted through the surface electrode (7) through the electron transit layer (6).Type: GrantFiled: September 24, 2002Date of Patent: April 13, 2004Assignee: Matsushita Electric Works, Ltd.Inventors: Takuya Komoda, Yoshiyuki Takegawa, Koichi Aizawa, Takashi Hatai, Tsutomu Ichihara, Yoshiaki Honda, Yoshifumi Watabe, Toru Baba
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Publication number: 20030102793Abstract: In a field emission-type electron source (10), a strong field drift layer (6) and a surface electrode (7) consisting of a gold thin film are provided on an n-type silicon substrate (1). An ohmic electrode (2) is provided on the back surface of the n-type silicon substrate (1). A direct current voltage is applied so that the surface electrode (7) becomes positive in potential relevant to the ohmic electrode (2). In this manner, electrons injected from the ohmic electrode (2) into the strong field drift layer (6) via the n-type silicon substrate (6) drift in the strong field drift layer (6), and is emitted to the outside via the surface electrode (7).Type: ApplicationFiled: November 5, 2002Publication date: June 5, 2003Inventors: Takuya Komoda, Koichi Aizawa, Yoshiaki Honda, Tsutomu Ichihara, Yoshifumi Watabe, Takashi Hatai, Toru Baba, Yoshiyuki Takegawa
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Publication number: 20030090211Abstract: An electron source (10) has an electron source element (10a) including a lower electrode (12), a drift layer (6) and a surface electrode (7). The drift layer (6) is interposed between the lower electrode (12) and the surface electrode (7). When a certain voltage is applied between the surface electrode (7) and the lower electrode (12) such that the surface electrode (7) has a higher potential than that of the lower electrode (12), a resultingly induced electric field allows electrons to pass through the drift layer (6) and then the electrons are emitted through the surface electrode (7). When a forward-bias voltage is applied between the surface electrode (7) and the lower electrode (12), a reverse-bias voltage is applied after the forward-bias voltage has been applied to release out of the drift layer (6) an electron captured by a trap (9) in the drift layer (6).Type: ApplicationFiled: October 28, 2002Publication date: May 15, 2003Applicant: MATSUSHITA ELECTRIC WORKS, LTD.Inventors: Takuya Komoda, Tsutomu Ichihara, Koichi Aizawa, Yoshiaki Honda, Yoshifumi Watabe, Takashi Hatai, Yoshiyuki Takegawa, Toru Baba
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Publication number: 20030076023Abstract: A lower electrode (2) and surface electrode (7) composed of a layer-structured conductive carbide layer is formed on one principal surface side of the substrate (1) composed of an insulative substrate such as a glass or ceramic substrate. A non-doped polycrystalline silicon layer (3) is formed on the lower electrode (2), An electron transit layer (6) composed of an oxidized porous polycrystalline silicon is formed on the polycrystalline silicon layer (3). The electron transit layer (6) is composed of a composite nanocrystal layer including polycrystalline silicon and many nanocrystalline silicons residing adjacent to a grain boundary of the polycrystalline silicon. When voltage is applied between the lower electrode (2) and the surface electrode (7) such that the surface electrode (7) has a higher potential, electrons are injected from the lower electrode (2) toward the surface electrode (7), and emitted through the surface electrode (7) through the electron transit layer (6).Type: ApplicationFiled: September 24, 2002Publication date: April 24, 2003Applicant: Matsushita Electric Works, Ltd.Inventors: Takuya Komoda, Yoshiyuki Takegawa, Koichi Aizawa, Takashi Hatai, Tsutomu Ichihara, Yoshiaki Honda, Yoshifumi Watabe, Toru Baba
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Patent number: 5800233Abstract: A cathode is formed on a glass substrate by depositing nickel thereon, and silicon dioxide is allowed to accumulate on the cathode by sputtering to form an insulator film. Then, a gate electrode is provided on the insulator film by depositing nickel thereon. A hole is formed on the glass substrate by lithography to carry out patterning, and the gate electrode and the insulator film are selectively etched to create a hole for the formation of an emitter emitting electrons. Furthermore, nickel is stacked into the hole by deposition to form the emitter, and subsequently the emitter is covered with sulfur as a high vapor-pressure substance to form a high vapor-pressure substance layer.Type: GrantFiled: February 9, 1996Date of Patent: September 1, 1998Assignee: Sharp Kabushiki KaishaInventors: Seiki Yano, Masao Urayama, Yoshiyuki Takegawa, Yuko Morita