Patents by Inventor Yoshiyuki Tomonaga

Yoshiyuki Tomonaga has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method of manufacturing the same
    Patent number: 9412685
    Abstract: A semiconductor device having a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface, a semiconductor chip mounted on the front surface of the substrate, a surface of the chip including a plurality of bonding pads, a plurality of bonding wires connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively, a first sealing layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip, and a second sealing layer comprised of the same material as the first sealing, the second sealing layer being formed above the first sealing layer.
    Type: Grant
    Filed: December 6, 2013
    Date of Patent: August 9, 2016
    Assignee: J-DEVICES CORPORATION
    Inventors: Yoshiyuki Tomonaga, Mitsuru Ooida, Katsumi Watanabe, Hidenari Sato
  • SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
    Publication number: 20140159215
    Abstract: A semiconductor device having a substrate including a plurality of external terminals on a rear surface and a plurality of bonding terminals electrically connected to the plurality of external terminals on a front surface, a semiconductor chip mounted on the front surface of the substrate, a surface of the chip including a plurality of bonding pads, a plurality of bonding wires connecting between the plurality of bonding pads or between the plurality of bonding terminals and the plurality of bonding wires respectively, a first sealing layer sealing the front surface of the substrate, the plurality of bonding wires and the semiconductor chip, and a second sealing layer comprised of the same material as the first sealing, the second sealing layer being formed above the first sealing layer.
    Type: Application
    Filed: December 6, 2013
    Publication date: June 12, 2014
    Applicant: J-DEVICES CORPORATION
    Inventors: Yoshiyuki Tomonaga, Mitsuru Ooida, Katsumi Watanabe, Hidenari Sato