Patents by Inventor Yoshuhiro Fujimura

Yoshuhiro Fujimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated circuit having alternate rows of logic cells and I/O cells
    Patent number: 5341049
    Abstract: A semiconductor IC device has an input/output circuit and an internal logic circuit connected with the input/output circuit formed in a main surface of a semiconductor substrate of a generally rectangular shape. The input/output circuit is divided into at least two input/output circuit blocks in such a manner that edges of the logic circuit blocks defined by the division on the main surface of the substrate extend in a direction substantially parallel with a pair of opposite sides of the substrate. The internal logic circuit is divided into at least three logic circuit blocks in such a manner that edges of the logic circuit blocks defined by the division on the main surface of the substrate extend in the above-mentioned direction. Each of the input/output circuit blocks is sandwiched by and electrically connected with adjacently arranged two of the logic circuit blocks.
    Type: Grant
    Filed: July 21, 1992
    Date of Patent: August 23, 1994
    Assignee: Hitachi, Ltd.
    Inventors: Atsushi Shimizu, Satoru Isomura, Takeo Yamada, Tohru Kobayashi, Yoshuhiro Fujimura, Yuko Ito