Patents by Inventor Yosifumi Matusita

Yosifumi Matusita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5936300
    Abstract: A pair of source/drain regions are formed on a semiconductor substrate at a predetermined interval. A gate insulator film is formed on the semiconductor substrate between the source/drain regions of the pair. A gate electrode is formed on the gate insulator film. A film for covering the gate electrode and the source/drain regions has a low permeability against water and a hydroxide group, and has a thickness greater than 3 nm and less than 5 nm.
    Type: Grant
    Filed: March 24, 1997
    Date of Patent: August 10, 1999
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Kazuhiro Sasada, Mamoru Arimoto, Hideharu Nagasawa, Atsuhiro Nishida, Hiroyuki Aoe, Yosifumi Matusita