Patents by Inventor Yossef Itigin
Yossef Itigin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240012773Abstract: A Direct Memory Access (DMA) device includes an interface and a DMA engine. The interface is configured to communicate with a first memory and with a second memory. The DMA engine is configured to (i) receive a request to transfer data between the first memory and the second memory in accordance with a pattern of offsets to be accessed in the first memory or in the second memory, and (ii) transfer the data in accordance with the request.Type: ApplicationFiled: July 6, 2022Publication date: January 11, 2024Inventors: Daniel Marcovitch, Gil Bloch, Richard Graham, Yossef Itigin, Ortal Ben Moshe, Roman Nudelman
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Publication number: 20240012753Abstract: A network device includes a first interface, a second interface, and circuitry. The first interface is configured to communicate at least with a memory. The second interface is configured to communicate over a network with a peer network device. The circuitry is configured to receive a request to transfer data over the network between the memory and the peer network device in accordance with (i) a pattern of offsets to be accessed in the memory and (ii) a memory key representing a memory space to be accessed using the pattern, and to transfer the data in accordance with the request.Type: ApplicationFiled: July 6, 2022Publication date: January 11, 2024Inventors: Daniel Marcovitch, Gil Bloch, Richard Graham, Yossef Itigin, Ortal Ben Moshe, Roman Nudelman
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Publication number: 20240015217Abstract: A network device includes a first interface, a second interface and circuitry. The first interface is configured to communicate at least with a first memory. The second interface is configured to communicate over a network with a peer network device coupled to a second memory. The circuitry is configured to (i) receive a request to transfer data over the network between the first memory and the second memory in accordance with a pattern of offsets to be accessed in the first memory or in the second memory, and (ii) transfer the data in accordance with the request.Type: ApplicationFiled: July 6, 2022Publication date: January 11, 2024Inventors: Daniel Marcovitch, Gil Bloch, Richard Graham, Yossef Itigin, Ortal Ben Moshe, Roman Nudelman
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Patent number: 10999364Abstract: An apparatus includes a network interface and circuitry. The network interface is configured to connect to a communication network. The circuitry is configured to receive, from a host, first RDMA requests in accordance with a first transport service type, for transferring data between an initiator process running on the host and one or more responder processes running on one or more remote computers, to convert the first RDMA requests into second RDMA requests in accordance with a second transport service type, different from the first transport service type, to communicate messages corresponding to the second transport service type with the remote computers, to convert completions, which are received from the one or more remote computers in accordance with the second transport service type, into corresponding completions to the first RDMA requests in accordance with the first transport service type, and to send the corresponding completions to the initiator process.Type: GrantFiled: October 11, 2020Date of Patent: May 4, 2021Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Yossef Itigin, Aviv Barnea
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Patent number: 10841231Abstract: A method including providing a hardware-implemented networking system having a sending device, the sending device being configured to communicate with a receiving device via a communications medium, and performing the following at the sending device: providing an initial value for transmission timeout and setting a current value for transmission timeout to the initial value, sending one or more packets associated with a given queue from the sending device to the receiving device via the communications medium, setting a packet transmission timeout timer associated with the given queue to the current value for transmission timeout; and upon expiration of a packet transmission timeout timer associated with the given queue, performing the following: A. determining whether one or more packets have been successfully received by the receiving device, and performing one or both of the following steps B and C: B.Type: GrantFiled: November 15, 2018Date of Patent: November 17, 2020Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Aviv Barnea, Ido Shamay, Eitan Zahavi, Yossef Itigin, Rotem Damsker
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Publication number: 20200162394Abstract: A method including providing a hardware-implemented networking system having a sending device, the sending device being configured to communicate with a receiving device via a communications medium, and performing the following at the sending device: providing an initial value for transmission timeout and setting a current value for transmission timeout to the initial value, sending one or more packets associated with a given queue from the sending device to the receiving device via the communications medium, setting a packet transmission timeout timer associated with the given queue to the current value for transmission timeout; and upon expiration of a packet transmission timeout timer associated with the given queue, performing the following: A. determining whether one or more packets have been successfully received by the receiving device, and performing one or both of the following steps B and C: B.Type: ApplicationFiled: November 15, 2018Publication date: May 21, 2020Inventors: Aviv Barnea, Ido Shamay, Eitan Zahavi, Yossef Itigin, Rotem Damsker
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Patent number: 10623521Abstract: A network adapter includes a network interface and circuitry. The network interface is assigned a single network address in a communication network, and is configured to receive, from one or more other nodes over the communication network, messages that are destined for processing by multiple threads in one or more processing cores of a network node including the network adapter, but are nevertheless addressed to the single network address. The circuitry is configured to hold a distribution rule for distributing the messages among multiple Receive Queues (RQs) that are accessible by the threads, and to select for each message received via the network interface a respective RQ, by applying the distribution rule to the message.Type: GrantFiled: December 26, 2016Date of Patent: April 14, 2020Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Shahaf Shuler, Noam Bloch, Yossef Itigin
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Patent number: 10498672Abstract: Network communication is carried out by transmitting messages in accordance with a predefined data exchange protocol among nodes that include a master domain and a plurality of client domains. A list of expected messages has a tail portion in the master domain and respective head portions in the client domains. A search is conducted for a match between the tag of a received message to tags in a list of unexpected messages that is maintained in the master domain. Upon a failure to find the match the receive is added to the list of expected messages. If a match is found then data in the message is written into a data buffer.Type: GrantFiled: January 29, 2018Date of Patent: December 3, 2019Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Richard Graham, Yossef Itigin
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Patent number: 10496595Abstract: Serialization and deserialization of an object are performed by transmitting metadata and addresses of data members in a byte stream through a data network, receiving the byte stream from the data network, defining a container for the object, obtaining the addresses of the data members in the first memory from the input byte stream, applying direct memory access (DMA) or remote direct memory access (RDMA) to read the data members using the obtained addresses, and writing the data members into the container to create a new instance of the object.Type: GrantFiled: December 14, 2017Date of Patent: December 3, 2019Assignee: Mellanox Technologies, Ltd.Inventors: Yuval Degani, Liran Liss, Michael Dubman, Yossef Itigin
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Publication number: 20180219804Abstract: Network communication is carried out by transmitting messages in accordance with a predefined data exchange protocol among nodes that include a master domain and a plurality of client domains. A list of expected messages has a tail portion in the master domain and respective head portions in the client domains. A search is conducted for a match between the tag of a received message to tags in a list of unexpected messages that is maintained in the master domain. Upon a failure to find the match the receive is added to the list of expected messages. If a match is found then data in the message is written into a data buffer.Type: ApplicationFiled: January 29, 2018Publication date: August 2, 2018Inventors: Richard Graham, Yossef Itigin
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Publication number: 20180183895Abstract: A network adapter includes a network interface and circuitry. The network interface is assigned a single network address in a communication network, and is configured to receive, from one or more other nodes over the communication network, messages that are destined for processing by multiple threads in one or more processing cores of a network node including the network adapter, but are nevertheless addressed to the single network address. The circuitry is configured to hold a distribution rule for distributing the messages among multiple Receive Queues (RQs) that are accessible by the threads, and to select for each message received via the network interface a respective RQ, by applying the distribution rule to the message.Type: ApplicationFiled: December 26, 2016Publication date: June 28, 2018Inventors: Shahaf Shuler, Noam Bloch, Yossef Itigin
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Patent number: 9742855Abstract: A method for communication includes posting, by a software process, a set of buffers in a memory of a host processor and creating in the memory a list of labels associated respectively with the buffers. The software process pushes a first part of the list to a network interface controller (NIC), while retaining a second part of the list in the memory under control of the software process. Upon receiving a message containing a label, sent over a network, the NIC compares the label to the labels in the first part of the list and, upon finding a match to the label, writes data conveyed by the message to a buffer in the memory. Upon a failure to find the match in the first part of the list, the NIC passes the message from the NIC to the software process for handling using the second part of the list.Type: GrantFiled: August 25, 2015Date of Patent: August 22, 2017Assignee: MELLANOX TECHNOLOGIES, LTD.Inventors: Shahaf Shuler, Noam Bloch, Ofer Hayut, Richard Graham, Ariel Shahar, Yossef Itigin