Abstract: An integrated circuit is provided that includes a plurality of modules comprising at least one clock-gated module and a controller unit, which is arranged to enable and disable provision of a clock signal to the at least one clock-gated module. The at least one clock-gated module includes one or more electronic circuits arranged to be in a first state of an electrical stress condition during a first portion of a period of time and in a second state of less electrical stress than in the first state during a second portion of the period of time. The at least one clock-gated module is further arranged to switch the one or more electronic circuits between the first state and the second state such that a change of a characteristic of at least one of the one or more electronic circuits caused by the electrical stress condition is at least partially reduced.

Abstract: A clock signal generator module arranged to generate at least one clock signal for at least one functional module is described. The clock signal generator module comprises a first clock source component associated with at least one functional module, at least one further clock source component associated with the at least one functional module, and at least one management unit arranged to controllably enable signal generation by the first and at least one further clock source components in accordance with at least one operating characteristic of the at least one functional module associated therewith.

Abstract: A clock signal generator module arranged to generate at least one clock signal for at least one functional module is described. The clock signal generator module comprises a first clock source component associated with at least one functional module, at least one further clock source component associated with the at least one functional module, and at least one management unit arranged to controllably enable signal generation by the first and at least one further clock source components in accordance with at least one operating characteristic of the at least one functional module associated therewith.

Abstract: An electronic device comprises a first component susceptible to a wearout effect, operation of which first component depends on an operating parameter, and a second component having an on-state and an off-state. The electronic device further comprises a time estimator for updating an estimate of an accumulated time the second component was in the on-state; and a controller for controlling the operating parameter on the basis of the accumulated time estimate so as to respond to the expected wearout effect. The first component and the second component may be the same, or the first component may have an on-state correlated to the on-state of the second component. The operating parameter may, for example, be a level or amplitude or correction value of one of the following: a voltage applied at the first component, an electric current fed to the first component, and a power provided to the first component. A method of operating such an electronic device is also disclosed.

Abstract: An integrated circuit is provided that includes a plurality of modules, comprising at least one clock-gated module; and a controller unit, which is arranged to enable and disable provision of a clock signal to the at least one clock-gated module. The at least one clock-gated module includes one or more electronic circuits arranged to be, in a first state of an electrical stress condition during a first portion of a period of time and in a second state of less electrical stress than in the first state during a second portion of the period of time. The at least one clock-gated module is further arranged to, switch the one or more electronic circuits between the first state and the second state such that a change of a characteristic of at least one of the one or more electronic circuits caused by the electrical stress condition is at least partially reduced.

Abstract: A multi-core processor includes a plurality of power gating elements for controlling power applied to each core. Each power gating element is coupled to a respective power gating controllers for controlling the respective power gating element to selectively provide full power to the respective core only during an active period of the respective core. A common power gating controller is coupled to the individual power gating controllers for controlling the individual power gating controllers to balance the active periods of the plurality of cores so as to substantially reduce or minimise overlapping active periods so as to reduce the total power provided to all the cores.

Abstract: An integrated circuit device comprising at least one signal processing module and a power gating control module arranged to control gating of at least one power supply to at least a part of the at least one signal processing module. The power gating control module is arranged to receive at least one operating parameter; configure at least one power gating setting of the power gating control module based at least partly on the at least one received operating parameter; and apply power gating for at least part of the at least one signal processing module in accordance with the at least one configured power gating setting.

Abstract: An electronic device comprises a first component susceptible to a wearout effect, operation of which first component depends on an operating parameter, and a second component having an on-state and an off-state. The electronic device further comprises a time estimator for updating an estimate of an accumulated time the second component was in the on-state; and a controller for controlling the operating parameter on the basis of the accumulated time estimate so as to respond to the expected wearout effect. The first component and the second component may be the same, or the first component may have an on-state correlated to the on-state of the second component. The operating parameter may, for example, be a level or amplitude or correction value of one of the following: a voltage applied at the first component, an electric current fed to the first component, and a power provided to the first component. A method of operating such an electronic device is also disclosed.