Patents by Inventor Yossi Tsfati

Yossi Tsfati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120140862
    Abstract: A method and apparatus are provided for identifying a cell and a sub-frame by detecting a part of a secondary synchronization signal including a sequence of N OFDM symbols. For each OFDM symbol, the method obtains a set of metrics, each metric being associated with a predetermined combination of a cell identifier and a sub-frame alignment (CID/SF). For each metric, the method counts the number of times a metric exceeds a first predetermined threshold, delivering a summed value, and applies an M of N criterion to the summed value, delivering a ratio value. The ratios values are analyzed in order to identify the cell and the sub-frame, corresponding to a cell identifier and a sub-frame alignment, associated to a particular ratio value among the ratios values, which exceeds a second predetermined threshold.
    Type: Application
    Filed: December 6, 2011
    Publication date: June 7, 2012
    Applicant: SEQUANS COMMUNICATIONS
    Inventors: Nadav Fine, Yossi Tsfati
  • Patent number: 8140031
    Abstract: A novel and useful self-calibration based production line testing mechanism utilizing built-in closed loop measurements in the radio to calibrate the output power of an external power amplifier coupled to a SoC radio. The mechanism is applicable during production line testing and calibration which is performed on each SoC and associated external power amplifier after assembly at the target PCB of the final product. The mechanism calibrates the TX output power in three phases based on loopback EVM measurements. In a first phase, the PPA in the radio (SoC) is calibrated and gain versus output power is stored in a gain table in on-chip NVS. In a second phase, the maximum PPA TX power is determined using closed loop EVM measurements. The external PA is calibrated in a third phase and the maximum PA power is determined. During this third phase, the maximum power of the device is calculated, compared to the requirements of the particular standard and a pass/fail determination is thereby made.
    Type: Grant
    Filed: December 3, 2007
    Date of Patent: March 20, 2012
    Assignee: Texas Instruments Incorporated
    Inventors: Yossi Tsfati, Nir Tal, Avi Baum, Itay Sherman
  • Patent number: 8050368
    Abstract: A novel and useful apparatus for and method of nonlinear adaptive phase domain equalization for multilevel phase coded demodulators. The invention improves the immunity of phase-modulated signals (PSK) to intersymbol interference (ISI) such as caused by transmitter or receiver impairments, frequency selective channel response filtering, timing offset or carrier frequency offset. The invention uses phase domain signals (r, ?) rather than the classical Cartesian quadrature components (I, Q) and employs a nonlinear adaptive equalizer on the phase domain signal. This results in significantly improved ISI performance which simplifies the design of a digital receiver.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: November 1, 2011
    Assignee: Texas Instruments Incorporated
    Inventors: Gregory Lerner, Yossi Tsfati
  • Patent number: 7809338
    Abstract: A novel and useful apparatus for and method of local oscillator (LO) generation with non-integer multiplication ratio between the local oscillator and RF frequencies. The LO generation schemes presented are operative to generate I and Q square waves at a designated frequency while avoiding the well known issue of harmonic pulling. An input baseband signal is interpolated and upconverted in the digital domain to an IF. The LO operates at a frequency which is a n/m division of the target RF frequency fRF. The IF frequency is configured to ½ of the LO frequency. The upconverted IF signal is then converted to the analog domain via digital power amplifiers followed by voltage combiners. The output of the combiners is band pass filtered to extract the desired replica.
    Type: Grant
    Filed: August 24, 2007
    Date of Patent: October 5, 2010
    Assignee: Texas Instruments Incorporated
    Inventor: Yossi Tsfati
  • Publication number: 20100008338
    Abstract: A novel and useful system for providing high transmission power using a shared Bluetooth and Wireless Local Area Network (WLAN) front end module (FEM). A single power amplifier in the front end module is shared between the WLAN and Bluetooth radio cores, thus providing a high power transmission option (Bluetooth class 1) for the Bluetooth core. Interface circuitry in the FEM couple either the WLAN TX output or the Bluetooth TX output to the input of the power amplifier and couple the output of the power amplifier to the external antenna. In the receive direction, the interface circuitry steers the antenna input to the respective WLAN or Bluetooth receivers in accordance with one or more control signals. Alternatively, a switch in the WLAN/Bluetooth radio chip functions to switch the Bluetooth TX output to a conventional FEM, thereby allowing the FEM power amplifier to be shared between the WLAN and Bluetooth radio cores.
    Type: Application
    Filed: July 14, 2008
    Publication date: January 14, 2010
    Inventors: Yossi Tsfati, Ian Sherlock, Oren E. Eliezer
  • Publication number: 20090257396
    Abstract: A novel and useful adaptive frequency hopping scheme for wireless devices and networks operating in a congested environment of similar devices, where capacity maximization is desired. The hopping sequence of each wireless link is dynamically adapted such that the impact of the surrounding interference is minimized and the interference induced onto the coexisting systems is also minimized. The scheme detects the repetitive presence of interference on a particular channel and comprises a replacement mechanism for swapping the interfered frequency-channel with one that would be clear for that particular time-slot. The mechanism detects interference during a redundant portion of the transmission (i.e. header or trailer) without having to experience packet failures (i.e. data loss). If the interference impact (e.g.
    Type: Application
    Filed: April 9, 2008
    Publication date: October 15, 2009
    Inventors: Oren E. Eliezer, Yossi Tsfati
  • Publication number: 20080298453
    Abstract: A novel and useful apparatus for and method of nonlinear adaptive phase domain equalization for multilevel phase coded demodulators. The invention improves the immunity of phase-modulated signals (PSK) to intersymbol interference (ISI) such as caused by transmitter or receiver impairments, frequency selective channel response filtering, timing offset or carrier frequency offset. The invention uses phase domain signals (r, ? rather than the classical Cartesian quadrature components (I, Q) and employs a nonlinear adaptive equalizer on the phase domain signal. This results in significantly improved ISI performance which simplifies the design of a digital receiver.
    Type: Application
    Filed: May 29, 2007
    Publication date: December 4, 2008
    Inventors: Gregory Lerner, Yossi Tsfati
  • Publication number: 20080288845
    Abstract: A novel and useful range extension and in-band noise mitigation mechanism that uses conventional CRC error detection codes to correct single and multiple bit errors in packets received over a communications link. The CRC error correction mechanism of the invention is particularly suitable for use with communication protocols with weak error correction capabilities. The mechanism uses the linearity property of the CRC calculation to detect the existence of errors in the received packet. The entire received packet is searched for single bit errors and are corrected in a single cycle. If no single bit errors are found, the mechanism then searches for multiple bit errors. Packet retransmissions are used to detect and mark the location of multiple bit errors. Multiple bit errors are corrected by trying a plurality of hypotheses of single bit error corrections. Each hypotheses pattern is investigated to find matching CRC patterns for correction using the single bit, single cycle CRC error correction method.
    Type: Application
    Filed: May 12, 2008
    Publication date: November 20, 2008
    Inventors: Yossi Tsfati, Gregory Lerner, Eli Dekel, Itay Sherman
  • Publication number: 20080144707
    Abstract: A novel and useful self-calibration based production line testing mechanism utilizing built-in closed loop measurements in the radio to calibrate the output power of an external power amplifier coupled to a SoC radio. The mechanism is applicable during production line testing and calibration which is performed on each SoC and associated external power amplifier after assembly at the target PCB of the final product. The mechanism calibrates the TX output power in three phases based on loopback EVM measurements. In a first phase, the PPA in the radio (SoC) is calibrated and gain versus output power is stored in a gain table in on-chip NVS. In a second phase, the maximum PPA TX power is determined using closed loop EVM measurements. The external PA is calibrated in a third phase and the maximum PA power is determined. During this third phase, the maximum power of the device is calculated, compared to the requirements of the particular standard and a pass/fail determination is thereby made.
    Type: Application
    Filed: December 3, 2007
    Publication date: June 19, 2008
    Inventors: Yossi Tsfati, Nir Tal, Avi Baum, Itay Sherman
  • Publication number: 20080129610
    Abstract: A novel and useful apparatus for and method of improving antenna matching and reducing mismatch loss for a VHF receiver such as an FM receiver. The invention can be used in a very low cost implementation of a single chip radio such as used in cellphone applications. The impedance of the low cost VHF antenna in cellphone application can dramatically vary across time, frequency and depending on the human body proximity resulting in a large mismatch loss. The adaptive antenna matching mechanism uses dynamically configurable on-chip variable capacitors to provide a custom matching network with the external inductor in a pi-network configuration. The variable ranges of the on-chip capacitors enable adaptation in a closed loop manner so that the optimum SNR is achieved thus ensuring minimum mismatch loss. The mechanism measures RSSI and SNR and, using a novel adaptive calibration mechanism, adjusts the internal matching network capacitors such that the mismatch loss is minimized.
    Type: Application
    Filed: November 26, 2007
    Publication date: June 5, 2008
    Inventors: Yossi Tsfati, Gangadhar Burra, Bruce Silverstein