Patents by Inventor Yosui FUTAMURA

Yosui FUTAMURA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967577
    Abstract: Disclosed herein is a semiconductor device including a conductive member that has a main surface facing in a thickness direction, a semiconductor element that has a plurality of pads facing the main surface, a plurality of electrodes that are individually formed with respect to the plurality of pads and protrude from the plurality of pads toward the main surface, and a bonding layer for electrically bonding the main surface to the plurality of electrodes. The bonding layer includes a first region having conductivity and a second region having electrical insulation. The first region includes a metal portion. At least a part of the second region includes a resin portion.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: April 23, 2024
    Assignee: ROHM Co., LTD.
    Inventors: Yosui Futamura, Yuto Nishiyama, Masahiko Nakamura
  • Publication number: 20240071877
    Abstract: A semiconductor device includes a first semiconductor element, a first object, a sealing resin and a covering part. The first semiconductor element includes a first electrode. The first object includes a first surface facing the first electrode. The sealing resin covers the first semiconductor element and the first object. The covering part is interposed between the first electrode and the first surface and contains a material having a higher thermal conductivity than the sealing resin.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Inventors: Yosui FUTAMURA, Shunya MIKAMI, Ryuta KIMURA, Kazuhisa KUMAGAI
  • Publication number: 20240030298
    Abstract: A semiconductor device includes: a semiconductor element that includes an element body containing a semiconductor, and a first electrode disposed on the element body; a first wire joined to the first electrode; a sealing resin that covers the semiconductor element and the first wire; and a covering portion interposed between the first electrode and the sealing resin. The first wire includes a first portion that extends from an inside of the first electrode toward an outside of the first electrode as viewed in a thickness direction of the semiconductor. The covering portion contains a material having a higher thermal conductivity than the sealing resin. The covering portion is in contact with the first portion of the first wire.
    Type: Application
    Filed: October 3, 2023
    Publication date: January 25, 2024
    Inventors: Yosui FUTAMURA, Shunya MIKAMI
  • Publication number: 20240030178
    Abstract: A semiconductor device includes a semiconductor element, a first lead, a second lead, and a first wire. The bonding-pad reverse surface is offset from the die-pad reverse surface toward the die-pad obverse surface-side in the z direction. The first wire is bonded to the first electrode and the bonding-pad obverse surface. The bonding pad portion includes a single first portion. The first portion is connected to the bonding-pad reverse surface, is surrounded by the bonding-pad reverse surface as viewed in the z direction, and includes a part present at a position different from the bonding-pad reverse surface in the z direction.
    Type: Application
    Filed: September 29, 2023
    Publication date: January 25, 2024
    Inventors: Yosui FUTAMURA, Shunya MIKAMI
  • Publication number: 20240030106
    Abstract: A semiconductor device includes a semiconductor element, a sealing resin and a covering portion. The semiconductor element includes an element body containing a semiconductor, and a first electrode disposed on the element body. The sealing resin covers the semiconductor element. The covering portion is interposed between the first electrode and the sealing resin. The covering portion contains a material having a higher thermal conductivity than the sealing resin. The first electrode of the semiconductor element includes a groove portion held in contact with the covering portion.
    Type: Application
    Filed: October 4, 2023
    Publication date: January 25, 2024
    Inventors: Yosui FUTAMURA, Shunya MIKAMI
  • Publication number: 20230411232
    Abstract: A semiconductor device includes a conductor, a semiconductor element, and a sealing resin. The conductor includes an obverse surface including a first edge, a reverse surface spaced apart from the obverse surface in a thickness direction and including a second edge, and an intermediate surface connected to the first edge and the second edge. The semiconductor element is supported on the obverse surface. The sealing resin covers the obverse surface, the semiconductor element, and at least a portion of the intermediate surface. The reverse surface of the conductor is exposed from the sealing resin. The first edge is located outward from the second edge as viewed in the thickness direction. In a cross section orthogonal to the first edge, the intermediate surface includes a first point located between the first edge and the second edge and a second point located between the first edge and the first point.
    Type: Application
    Filed: November 1, 2021
    Publication date: December 21, 2023
    Inventor: Yosui FUTAMURA
  • Publication number: 20230402348
    Abstract: A semiconductor device includes: a support member having an obverse surface facing in a thickness direction; a semiconductor element mounted on the obverse surface; and a bonding layer that bonds the obverse surface and the semiconductor element. The support member has a base member, and a metal layer mounted on the base member and including the obverse surface. The support member includes a first region in contact with the bonding layer, and a second region adjacent to the first region as viewed in the thickness direction. The bonding layer contains a metal composition in a solid phase. The second region is more repellent to a liquid phase of the metal composition than the first region.
    Type: Application
    Filed: December 20, 2021
    Publication date: December 14, 2023
    Inventor: Yosui FUTAMURA
  • Publication number: 20230094354
    Abstract: An electronic device which can suppress peeling off and damaging of the bonding material is provided. The electronic device includes an electronic component, a mounting portion, and a bonding material. The electronic component has an element front surface and an element back surface separated in the z-direction. The mounting portion has a mounting surface opposed to the element back surface on which the electronic component is mounted. The bonding material bonds the electronic component to the mounting portion. The bonding material includes a base portion and a fillet portion. The base portion is held between the electronic component and the mounting portion in the z-direction. The fillet portion is connected to the base portion and is formed outside the electronic component when seen in the z-direction. The electronic component includes two element lateral surface and ridges. The ridges are intersections of the two element lateral surface and extend in the z-direction.
    Type: Application
    Filed: January 18, 2021
    Publication date: March 30, 2023
    Inventors: Yosui FUTAMURA, Masahiko NAKAMURA
  • Patent number: 11521917
    Abstract: A semiconductor device includes a chip that includes a mounting surface, a non-mounting surface, and a side wall connecting the mounting surface and the non-mounting surface and has an eaves portion protruding further outward than the mounting surface at the side wall and a metal layer that covers the mounting surface.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: December 6, 2022
    Assignee: ROHM CO., LTD.
    Inventors: Yosui Futamura, Masahiko Nakamura
  • Publication number: 20220301966
    Abstract: A semiconductor device includes: a first lead; a first semiconductor element mounted on the first lead; and a sealing resin that covers the first semiconductor element, wherein the first lead includes: a first die pad having a first main surface and a first back surface; a second die pad arranged side by side with the first die pad and located on a side of the first main surface with respect to the first die pad; and a connecting portion connected to the first die pad and the second die pad, wherein the second die pad has a second main surface and a second back surface, and wherein the connecting portion has a connecting portion main surface connected to the first main surface and the second main surface, and an inhibiting portion arranged on the connecting portion main surface and configured to inhibit a flow of a fluid.
    Type: Application
    Filed: February 28, 2022
    Publication date: September 22, 2022
    Inventors: Ryuta KIMURA, Yosui FUTAMURA
  • Publication number: 20220301965
    Abstract: There is provided a semiconductor device including: a first lead; a first semiconductor element mounted on the first lead; and a sealing resin that covers the first semiconductor element, wherein the first lead includes a first die pad, a second die pad, a third die pad, a first connecting portion, and a second connecting portion, wherein the first die pad has a first main surface and a first back surface facing opposite sides in a thickness direction, and wherein the second die pad is arranged side by side with the first die pad in a first direction orthogonal to the thickness direction, and is located on a side of the first main surface with respect to the first die pad in the thickness direction.
    Type: Application
    Filed: February 23, 2022
    Publication date: September 22, 2022
    Inventors: Ryuta KIMURA, Yosui FUTAMURA
  • Publication number: 20220301967
    Abstract: A semiconductor device includes: a first lead; a first semiconductor element mounted on the first lead; a sealing resin that covers the first semiconductor element; and a heat transfer member arranged on the first lead, wherein the first lead includes: a first die pad having a first main surface and a first back surface; a second die pad arranged side by side with the first die pad and located on a side of the first main surface with respect to the first die pad; and a connecting portion connected to the first and second die pads, wherein the second die pad has a second main surface facing the same side as the first main surface, and a second back surface facing the same side as the first back surface, and wherein the heat transfer member is arranged on the second back surface and is exposed from the sealing resin.
    Type: Application
    Filed: February 28, 2022
    Publication date: September 22, 2022
    Inventors: Ryuta KIMURA, Yosui FUTAMURA
  • Publication number: 20220301993
    Abstract: A semiconductor device includes: a first lead; a first semiconductor element mounted on the first lead; and a sealing resin that covers the first semiconductor element, wherein the first lead includes: a first die pad having a first main surface and a first back surface facing opposite sides to each other in a thickness direction; a second die pad arranged side by side with the first die pad in a first direction orthogonal to the thickness direction, and located on a side of the first main surface with respect to the first die pad in the thickness direction; and a connecting portion connected to the first die pad and the second die pad, and wherein the first back surface is exposed from the sealing resin.
    Type: Application
    Filed: February 28, 2022
    Publication date: September 22, 2022
    Inventors: Ryuta KIMURA, Yosui FUTAMURA
  • Publication number: 20220157758
    Abstract: Provided is a semiconductor device including a conductive member including a main surface facing one side in a thickness direction; a semiconductor element including a plurality of pads facing the main surface of the conductive member; and a plurality of electrodes protruding from the plurality of pads toward the other side in the thickness direction. The conductive member includes a plurality of recessed portions recessed from the main surface toward the other side in the thickness direction. The semiconductor device further includes a bonding layer that is conductive and that is arranged in each of the plurality of recessed portions. The plurality of electrodes are separately inserted into the plurality of recessed portions. The conductive member and the plurality of electrodes are bonded through the bonding layers.
    Type: Application
    Filed: November 10, 2021
    Publication date: May 19, 2022
    Inventors: Yosui Futamura, Akinori Nii
  • Publication number: 20220115347
    Abstract: Disclosed herein is a semiconductor device including a conductive member that has a main surface facing in a thickness direction, a semiconductor element that has a plurality of pads facing the main surface, a plurality of electrodes that are individually formed with respect to the plurality of pads and protrude from the plurality of pads toward the main surface, and a bonding layer for electrically bonding the main surface to the plurality of electrodes. The bonding layer includes a first region having conductivity and a second region having electrical insulation. The first region includes a metal portion. At least a part of the second region includes a resin portion.
    Type: Application
    Filed: October 12, 2021
    Publication date: April 14, 2022
    Inventors: Yosui Futamura, Yuto Nishiyama, Masahiko Nakamura
  • Publication number: 20200373227
    Abstract: A semiconductor device includes a chip that includes a mounting surface, a non-mounting surface, and a side wall connecting the mounting surface and the non-mounting surface and has an eaves portion protruding further outward than the mounting surface at the side wall and a metal layer that covers the mounting surface.
    Type: Application
    Filed: May 21, 2020
    Publication date: November 26, 2020
    Inventors: Yosui FUTAMURA, Masahiko NAKAMURA
  • Patent number: 10090229
    Abstract: A semiconductor device includes a plurality of islands, each having an outer surface including an upper surface and end surfaces, semiconductor chips, above the respective islands, a bonding material, between the islands and the semiconductor chips, and plating layers, formed on the outer surfaces of the islands, and with at least one of the plurality of islands, the island is exposed as a bare surface region at a first end surface, which, among the end surfaces of the one island, faces the island adjacent thereto.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: October 2, 2018
    Assignee: ROHM CO., LTD.
    Inventors: Motoharu Haga, Yosui Futamura
  • Publication number: 20170301612
    Abstract: A semiconductor device includes a plurality of islands, each having an outer surface including an upper surface and end surfaces, semiconductor chips, above the respective islands, a bonding material, between the islands and the semiconductor chips, and plating layers, formed on the outer surfaces of the islands, and with at least one of the plurality of islands, the island is exposed as a bare surface region at a first end surface, which, among the end surfaces of the one island, faces the island adjacent thereto.
    Type: Application
    Filed: April 5, 2017
    Publication date: October 19, 2017
    Applicant: ROHM CO., LTD.
    Inventors: Motoharu HAGA, Yosui FUTAMURA