Patents by Inventor Yosuke Hirata

Yosuke Hirata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145517
    Abstract: Provided is a solid-state image capturing element including a semiconductor substrate and first and second photoelectric conversion parts configured to convert light into electric charge. The first and the second photoelectric conversion parts each have a laminated structure including an upper electrode, a lower electrode, a photoelectric conversion film sandwiched between the upper electrode and the lower electrode, and an accumulation electrode facing the upper electrode through the photoelectric conversion film and an insulating film.
    Type: Application
    Filed: December 19, 2023
    Publication date: May 2, 2024
    Applicants: SONY GROUP CORPORATION, SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kenichi MURATA, Masahiro JOEI, Fumihiko KOGA, Iwao YAGI, Shintarou HIRATA, Hideaki TOGASHI, Yosuke SAITO, Shingo TAKAHASHI
  • Patent number: 11974444
    Abstract: There is provided a solid-state image sensor, a solid-state imaging device, an electronic apparatus, and a method of manufacturing a solid-state image sensor capable of improving characteristics. There is provided a solid-state image sensor including a stacked structure that includes a semiconductor substrate, a first photoelectric converter provided above the semiconductor substrate and converting light into charges, and a second photoelectric converter provided above the first photoelectric converter and converting light into charges, where the first photoelectric converter and the second photoelectric converter include a photoelectric conversion stacked structure in which a common electrode, a photoelectric conversion film, and a readout electrode are stacked so that the first photoelectric converter and the second photoelectric converter are in a line-symmetrical relationship with each other with a vertical plane perpendicular to a stacking direction of the stacked structure as an axis of symmetry.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: April 30, 2024
    Assignees: SONY CORPORATION, SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hideaki Togashi, Iwao Yagi, Masahiro Joei, Fumihiko Koga, Kenichi Murata, Shintarou Hirata, Yosuke Saito, Akira Furukawa
  • Patent number: 11954744
    Abstract: The actual performance information classify part derives a classification result of an actual performance information on electric power demand, by a classification setting information, from an environment information and a date attribute information which is correlated with each of the electric power demands which is included in an actual performance information on electric power demand. The prediction information calculate part derives a classification result of a prediction target day, using the date attribute information of the prediction target day, which is a day to conduct a prediction, and the environment information which is measured before a start of the prediction of a prediction target day, and in addition, predicts an electric power demand of a prediction target day, based on the electric power demand of the actual performance information on electric power demand, which corresponds to the classification result of the prediction target day.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: April 9, 2024
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yosuke Hirata, Yuta Okumura, Yoshito Nishita
  • Publication number: 20240097547
    Abstract: Provided is a magnetic strain wave gear device that makes it possible to achieve both improvement of the efficiency of assembly work and suppression of decrease in energy conversion efficiency. A magnetic strain wave gear device includes: a stator having a stator core, a stator winding, and a stator magnet; a first rotor; and a second rotor. The second rotor includes a second rotor core provided with a plurality of rotor magnet insertion holes and a plurality of rotor magnets inserted into the plurality of respective rotor magnet insertion holes. The first rotor includes a cylindrical first rotor core and a first rotor end plate. The first rotor end plate has a rotor magnet passage hole through which the rotor magnets can be inserted into the rotor insertion holes from outside in a direction of a rotation shaft.
    Type: Application
    Filed: August 2, 2021
    Publication date: March 21, 2024
    Applicants: Mitsubishi Electric Corporation, OSAKA UNIVERSITY
    Inventors: Yosuke UCHIDA, Ryoji MIYATAKE, Atsushi YAMAMOTO, Haruyuki KOMETANI, Noboru NIGUCHI, Katsuhiro HIRATA, Kazuaki TAKAHARA, Hironori SUZUKI, Takuya ITO
  • Publication number: 20220129998
    Abstract: The actual performance information classify part derives a classification result of an actual performance information on electric power demand, by a classification setting information, from an environment information and a date attribute information which is correlated with each of the electric power demands which is included in an actual performance information on electric power demand. The prediction information calculate part derives a classification result of a prediction target day, using the date attribute information of the prediction target day, which is a day to conduct a prediction, and the environment information which is measured before a start of the prediction of a prediction target day, and in addition, predicts an electric power demand of a prediction target day, based on the electric power demand of the actual performance information on electric power demand, which corresponds to the classification result of the prediction target day.
    Type: Application
    Filed: March 31, 2020
    Publication date: April 28, 2022
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yosuke HIRATA, Yuta OKUMURA, Yoshito NISHITA
  • Patent number: 9972438
    Abstract: A method for manufacturing a laminated ceramic capacitor having a laminated body including a plurality of stacked ceramic layers and internal electrodes located between the ceramic layers. The laminated body has a pair of mutually opposed principal surfaces extending in the direction in which the ceramic layers extend, a pair of mutually opposed side surfaces and a pair of mutually opposed end surfaces which respectively extend in directions orthogonal to the principal surfaces. The internal electrodes are 0.4 ?m or less in thickness, and are located in an area defined by a width-direction gap of 30 ?m or less interposed with respect to each of the pair of side surfaces and an outer layer thickness of 35 ?m or less interposed with respect to each of the pair of principal surfaces.
    Type: Grant
    Filed: June 3, 2016
    Date of Patent: May 15, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yoshito Saito, Yosuke Hirata, Takashi Hiramatsu
  • Patent number: 9478357
    Abstract: A multilayer ceramic electronic component that has a multilayer portion having an outer layer portion adjacent region including an area in contact with an outer layer portion that forms a thermal-shock absorbing portion that includes curved ceramic layers and inner electrode layers smoothly varying in thickness from point to point. A region to an inside of the thermal-shock absorbing portion forms a normal multilayer portion that includes ceramic layers with less curvature than the ceramic layers in the thermal-shock absorbing portion and inner electrode layers with less variation in thickness from point to point in a direction along a principal surface of the outer layer portion than the inner electrode layers in the thermal-shock absorbing portion.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: October 25, 2016
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hiroyuki Wada, Yosuke Hirata, Takashi Hiramatsu, Yoshito Saito, Hideaki Tsuji, Hiroyuki Ukai
  • Publication number: 20160284474
    Abstract: A method for manufacturing a laminated ceramic capacitor having a laminated body including a plurality of stacked ceramic layers and internal electrodes located between the ceramic layers. The laminated body has a pair of mutually opposed principal surfaces extending in the direction in which the ceramic layers extend, a pair of mutually opposed side surfaces and a pair of mutually opposed end surfaces which respectively extend in directions orthogonal to the principal surfaces. The internal electrodes are 0.4 ?m or less in thickness, and are located in an area defined by a width-direction gap of 30 ?m or less interposed with respect to each of the pair of side surfaces and an outer layer thickness of 35 ?m or less interposed with respect to each of the pair of principal surfaces.
    Type: Application
    Filed: June 3, 2016
    Publication date: September 29, 2016
    Inventors: YOSHITO SAITO, Yosuke Hirata, Takashi Hiramatsu
  • Patent number: 9183986
    Abstract: A laminated body is divided into a large grain region and a small grain region. The large grain region is located outside the small grain region, and a boundary surface between the regions is located inside the outer surface of the laminated body while surrounding a section in which internal electrodes are present in the laminated body. To obtain the laminated body, firing is carried out with a profile in which the average rate of increase from room to the maximum temperature is 40° C./second or more.
    Type: Grant
    Filed: August 1, 2013
    Date of Patent: November 10, 2015
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yosuke Hirata, Hideaki Tsuji, Nagato Omori, Hiroyuki Wada, Takashi Hiramatsu, Yoshito Saito
  • Patent number: 9136058
    Abstract: A laminated ceramic capacitor including a laminated body having a plurality of stacked ceramic layers and internal electrodes located between the ceramic layers. The internal electrodes have a plurality of ceramic columnar members formed therein, which project into the internal electrodes from interfaces between the ceramic layers and the internal electrodes, but do not penetrate in the thickness direction of the internal electrodes.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: September 15, 2015
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Hiroyuki Wada, Yosuke Hirata, Takashi Hiramatsu, Yoshito Saito, Hideaki Tsuji, Hiroyuki Ukai
  • Publication number: 20150077897
    Abstract: A multilayer ceramic electronic component that has a multilayer portion having an outer layer portion adjacent region including an area in contact with an outer layer portion that forms a thermal-shock absorbing portion that includes curved ceramic layers and inner electrode layers smoothly varying in thickness from point to point. A region to an inside of the thermal-shock absorbing portion forms a normal multilayer portion that includes ceramic layers with less curvature than the ceramic layers in the thermal-shock absorbing portion and inner electrode layers with less variation in thickness from point to point in a direction along a principal surface of the outer layer portion than the inner electrode layers in the thermal-shock absorbing portion.
    Type: Application
    Filed: November 21, 2014
    Publication date: March 19, 2015
    Inventors: Hiroyuki Wada, Yosuke Hirata, Takashi Hiramatsu, Yoshito Saito, Hideaki Tsuji, Hiroyuki Ukai
  • Patent number: 8858746
    Abstract: A method of manufacturing a laminated body in a raw state for a laminated ceramic capacitor, which includes dielectric ceramic layers containing a dielectric ceramic raw material powder for and internal electrodes, in which a heat treatment is carried out in accordance with a temperature profile in which the average rate of temperature rise is 40° C./second or more from room temperature to a maximum temperature. The dielectric ceramic raw material powder contains a BaTiO3 system as its main constituent and contains Re (Re is at least one selected from Sc, Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu) as an accessory constituent, in which the content of Re is 0.3 to 3 parts by mol with respect to 100 parts by mol of the main constituent.
    Type: Grant
    Filed: February 14, 2012
    Date of Patent: October 14, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masayuki Ishihara, Yosuke Hirata, Hideaki Tsuji
  • Publication number: 20140078641
    Abstract: A laminated body is divided into a large grain region and a small grain region. The large grain region is located outside the small grain region, and a boundary surface between the regions is located inside the outer surface of the laminated body while surrounding a section in which internal electrodes are present in the laminated body. To obtain the laminated body, firing is carried out with a profile in which the average rate of increase from room to the maximum temperature is 40° C./second or more.
    Type: Application
    Filed: August 1, 2013
    Publication date: March 20, 2014
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Yosuke Hirata, Hideaki Tsuji, Nagato Omori, Hiroyuki Wada, Takashi Hiramatsu, Yoshito Saito
  • Patent number: 8540832
    Abstract: Changes in states giving rise to electrode breakage and ball formation are made less likely during firing step for sintering the laminated body, and the improvement in DC bias characteristics is achieved in laminated ceramic electronic components with a laminated body which has internal electrodes, even when ceramic layers and the internal electrodes are reduced in thickness. The laminated body is divided into a large grain region in which the ceramic has a relatively large grain diameter and a small grain region in which the ceramic has a relatively small grain diameter. The large grain region is located outside the small grain region, and a boundary surface between the large grain region and the small grain region is located inside the outer surface of the laminated body while surrounding a section in which the internal electrodes are present in the laminated body.
    Type: Grant
    Filed: January 11, 2011
    Date of Patent: September 24, 2013
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yosuke Hirata, Hideaki Tsuji, Nagato Omori, Hiroyuki Wada, Takashi Hiramatsu, Yoshito Saito
  • Patent number: 8532965
    Abstract: According to one embodiment, a system is disclosed, which uses road parameters defining the road network and model parameters used as initial-value parameters, thereby performing traffic simulation by the microsimulation method. The system includes a traffic simulator and a display controller. The traffic simulator performs traffic simulation to predict a traffic condition on an object road of a road network. The display controller controls a display unit, displaying the result of the simulation. More precisely, the display controller displays a dynamic image showing the traffic condition of vehicles running on the road network, on the screen of the display unit, and changes the image in terms of pattern, in accordance with a display instruction.
    Type: Grant
    Filed: July 24, 2009
    Date of Patent: September 10, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yosuke Hirata, Hideki Ueno, Yoshikazu Ooba
  • Publication number: 20120140376
    Abstract: A method of manufacturing a laminated body in a raw state for a laminated ceramic capacitor, which includes dielectric ceramic layers containing a dielectric ceramic raw material powder for and internal electrodes, in which a heat treatment is carried out in accordance with a temperature profile in which the average rate of temperature rise is 40° C./second or more from room temperature to a maximum temperature. The dielectric ceramic raw material powder contains a BaTiO3 system as its main constituent and contains Re (Re is at least one selected from Sc, Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, and Lu) as an accessory constituent, in which the content of Re is 0.3 to 3 parts by mol with respect to 100 parts by mol of the main constituent.
    Type: Application
    Filed: February 14, 2012
    Publication date: June 7, 2012
    Inventors: Masayuki Ishihara, Yosuke Hirata, Hideaki Tsuji
  • Publication number: 20110110014
    Abstract: Changes in states giving rise to electrode breakage and ball formation are made less likely during firing step for sintering the laminated body, and the improvement in DC bias characteristics is achieved in laminated ceramic electronic components with a laminated body which has internal electrodes, even when ceramic layers and the internal electrodes are reduced in thickness. The laminated body is divided into a large grain region in which the ceramic has a relatively large grain diameter and a small grain region in which the ceramic has a relatively small grain diameter. The large grain region is located outside the small grain region, and a boundary surface between the large grain region and the small grain region is located inside the outer surface of the laminated body while surrounding a section in which the internal electrodes are present in the laminated body.
    Type: Application
    Filed: January 11, 2011
    Publication date: May 12, 2011
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Yosuke Hirata, Hideaki Tsuji, Nagato Omori, Hiroyuki Wada, Takashi Hiramatsu, Yoshito Saito
  • Publication number: 20100070253
    Abstract: According to one embodiment, a system is disclosed, which uses road parameters defining the road network and model parameters used as initial-value parameters, thereby performing traffic simulation by the microsimulation method. The system includes a traffic simulator and a display controller. The traffic simulator performs traffic simulation to predict a traffic condition on an object road of a road network. The display controller controls a display unit, displaying the result of the simulation. More precisely, the display controller displays a dynamic image showing the traffic condition of vehicles running on the road network, on the screen of the display unit, and changes the image in terms of pattern, in accordance with a display instruction.
    Type: Application
    Filed: July 24, 2009
    Publication date: March 18, 2010
    Inventors: Yosuke Hirata, Hideki Ueno, Yoshikazu Ooba
  • Patent number: 5929720
    Abstract: An electromagnetic wave matching element makes it possible to reduce the cost of a transmission system to a great degree. An electromagnetic wave matching element is adapted to allow electromagnetic wave beams incident from an entrance to be reflected by using plural mirrors to couple these reflected electromagnetic wave beams to an external transmission system through an exit. Mirrors are used that have a shape adapted to receive the plural electromagnetic waves in a beam form and to output electromagnetic wave beams having a predetermined distribution in which the number of the output electromagnetic waves is different from the number of the received electromagnetic waves.
    Type: Grant
    Filed: September 13, 1996
    Date of Patent: July 27, 1999
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yosuke Hirata, Yoshika Mitsunaka, Kenichi Hayashi, Yasuyuki Itoh
  • Patent number: 5719470
    Abstract: An electron beam generated by an electron gun is oscillated in a cavity resonator and output as a millimeter electromagnetic wave. The output electromagnetic wave is transmitted to a cylindrical mode converter. The inner wall surface of this mode converter has a plurality of sets of ridges and grooves spirally formed at equal pitches so as to gradually change the degree of corrugation in the transmission direction of the electromagnetic wave. The mode converter separates the input electromagnetic wave from the cavity resonator into a plurality of electromagnetic waves having the same power distribution. The output electromagnetic waves from the mode converter are transformed into wave beams by mirror systems and output to the outside of a gyrotron from output windows provided in a one-to-one correspondence with these electromagnetic waves.
    Type: Grant
    Filed: June 2, 1995
    Date of Patent: February 17, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yosuke Hirata, Mitsuo Komuro, Yoshika Mitsunaka