Patents by Inventor Yosuke Imazeki

Yosuke Imazeki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10170402
    Abstract: A semiconductor device includes a wiring substrate having an upper surface, a plurality of terminals formed on the upper surface, and a lower surface opposite to the upper surface, a first semiconductor chip having a first main surface, a plurality of first electrodes formed on the first main surface, and a first rear surface opposite to the first main surface, and mounted over the upper surface of the wiring substrate such that the first rear surface of the first semiconductor chip faces the upper surface of the wiring substrate, and a plurality of wires electrically connected with the plurality of terminals, respectively.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: January 1, 2019
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yosuke Imazeki, Soshi Kuroda
  • Patent number: 9728487
    Abstract: An object of the present invention is to improve the reliability of a semiconductor device having an imaging function. A semiconductor device includes a package having a cavity and terminals (TE1), a semiconductor chip that has an imaging unit and is arranged in the cavity, and a cap material with which the cavity is sealed and which has translucency. In addition, the semiconductor device includes a mounting board that has a through-hole and terminals (TE2) and is arranged so as to electrically couple the terminals (TE1) to the terminals (TE2), a heat transfer member that is inserted into the through-hole and is coupled to the package, and a heat sink coupled to the heat transfer member.
    Type: Grant
    Filed: April 9, 2016
    Date of Patent: August 8, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Takashi Karashima, Yumi Imamura, Yosuke Imazeki
  • Publication number: 20160343755
    Abstract: An object of the present invention is to improve the reliability of a semiconductor device having an imaging function. A semiconductor device includes a package having a cavity and terminals (TE1), a semiconductor chip that has an imaging unit and is arranged in the cavity, and a cap material with which the cavity is sealed and which has translucency. In addition, the semiconductor device includes a mounting board that has a through-hole and terminals (TE2) and is arranged so as to electrically couple the terminals (TE1) to the terminals (TE2), a heat transfer member that is inserted into the through-hole and is coupled to the package, and a heat sink coupled to the heat transfer member.
    Type: Application
    Filed: April 9, 2016
    Publication date: November 24, 2016
    Inventors: Takashi KARASHIMA, Yumi Imamura, Yosuke Imazeki
  • Publication number: 20160163625
    Abstract: A semiconductor device includes a wiring substrate having an upper surface, a plurality of terminals formed on the upper surface, and a lower surface opposite to the upper surface, a first semiconductor chip having a first main surface, a plurality of first electrodes formed on the first main surface, and a first rear surface opposite to the first main surface, and mounted over the upper surface of the wiring substrate such that the first rear surface of the first semiconductor chip faces the upper surface of the wiring substrate, and a plurality of wires electrically connected with the plurality of terminals, respectively.
    Type: Application
    Filed: February 11, 2016
    Publication date: June 9, 2016
    Inventors: Yosuke IMAZEKI, Soshi KURODA
  • Patent number: 9281289
    Abstract: To enhance the reliability of a semiconductor device. The semiconductor device includes a wiring substrate having a plurality of bonding fingers (terminal) formed on a chip-mounting surface, a semiconductor chip mounted on the wiring substrate, a plurality of wires having a ball part and a stitch part respectively. The bonding fingers have a first bonding finger to which the stitch part of the first wire is coupled respectively, and the second bonding finger to which a ball part of the second wire is coupled. In addition, in plan view, the second bonding finger is arranged at a position different from the arrangement of a plurality of first bonding fingers, and the width of the second bonding finger is larger than the width of the first bonding finger.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: March 8, 2016
    Assignee: Renesas Electronics Corporation
    Inventors: Yosuke Imazeki, Soshi Kuroda
  • Publication number: 20150035172
    Abstract: To enhance the reliability of a semiconductor device. The semiconductor device includes a wiring substrate having a plurality of bonding fingers (terminal) formed on a chip-mounting surface, a semiconductor chip mounted on the wiring substrate, a plurality of wires having a ball part and a stitch part respectively. The bonding fingers have a first bonding finger to which the stitch part of the first wire is coupled respectively, and the second bonding finger to which a ball part of the second wire is coupled. In addition, in plan view, the second bonding finger is arranged at a position different from the arrangement of a plurality of first bonding fingers, and the width of the second bonding finger is larger than the width of the first bonding finger.
    Type: Application
    Filed: July 11, 2014
    Publication date: February 5, 2015
    Inventors: Yosuke Imazeki, Soshi Kuroda