Patents by Inventor Yosuke Katsura

Yosuke Katsura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220013508
    Abstract: Reliability of a semiconductor device is improved. The semiconductor device PKG1 includes a wiring substrate SUB1, a semiconductor chip CHP1 and a capacitor CDC mounted on the upper surface 2t of the wiring substrate SUB1, and a lid LD formed of a metallic plate covering the semiconductor chip CHP1 and the wiring substrate SUB1. The semiconductor chip CHP1 is bonded to the lid LD via a conductive adhesive layer, and the capacitor CDC, which is thicker than the thickness of the semiconductor chip CHP1, is disposed in the cut off portion 4d1 provided in the lid LD, and is exposed from the lid LD.
    Type: Application
    Filed: September 27, 2021
    Publication date: January 13, 2022
    Inventors: Toshihiko AKIBA, Kenji SAKATA, Nobuhiro KINOSHITA, Yosuke KATSURA
  • Patent number: 11158617
    Abstract: Reliability of a semiconductor device is improved. The semiconductor device PKG1 includes a wiring substrate SUB1, a semiconductor chip CHP1 and a capacitor CDC mounted on the upper surface 2t of the wiring substrate SUB1, and a lid LD formed of a metallic plate covering the semiconductor chip CHP1 and the wiring substrate SUB1. The semiconductor chip CHP1 is bonded to the lid LD via a conductive adhesive layer, and the capacitor CDC, which is thicker than the thickness of the semiconductor chip CHP1, is disposed in the cut off portion 4d1 provided in the lid LD, and is exposed from the lid LD.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: October 26, 2021
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Toshihiko Akiba, Kenji Sakata, Nobuhiro Kinoshita, Yosuke Katsura
  • Patent number: 10763214
    Abstract: Performance of a semiconductor device is improved. The semiconductor device includes a semiconductor chip and a chip component that are electrically connected to each other via a wiring substrate. The semiconductor chip includes an input/output circuit and an electrode pad electrically connected to the input/output circuit and transmitting the signal. The chip component includes a plurality of types of passive elements and includes an equalizer circuit for correcting signal waveforms of the signal, and electrodes electrically connected to the equalizer circuit. The path length from the signal electrode of the semiconductor chip to the electrode of the chip component is 1/16 or more and 3.5/16 or less with respect to the wavelength of the signal.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: September 1, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shuuichi Kariyazaki, Kazuyuki Nakagawa, Keita Tsuchiya, Yosuke Katsura, Shinji Katayama, Norio Chujo, Masayoshi Yagyu, Yutaka Uematsu
  • Patent number: 10553558
    Abstract: A semiconductor device includes a memory component, which is a semiconductor component (a semiconductor chip or a semiconductor package), to be mounted over an upper surface of a wiring substrate. In addition, in the upper surface, a distance between the memory component and a first substrate side of the upper surface is smaller than a distance between the memory component and a second substrate side of the upper surface. In addition, in the upper surface, a dam portion is formed between the memory component and the first substrate side.
    Type: Grant
    Filed: July 27, 2016
    Date of Patent: February 4, 2020
    Assignee: Renesas Electronics Corporation
    Inventors: Yosuke Katsura, Yusuke Tanuma
  • Publication number: 20200006303
    Abstract: Reliability of a semiconductor device is improved. The semiconductor device PKG1 includes a wiring substrate SUB1, a semiconductor chip CHP1 and a capacitor CDC mounted on the upper surface 2t of the wiring substrate SUB1, and a lid LD formed of a metallic plate covering the semiconductor chip CHP1 and the wiring substrate SUB1. The semiconductor chip CHP1 is bonded to the lid LD via a conductive adhesive layer, and the capacitor CDC, which is thicker than the thickness of the semiconductor chip CHP1, is disposed in the cut off portion 4d1 provided in the lid LD, and is exposed from the lid LD.
    Type: Application
    Filed: June 18, 2019
    Publication date: January 2, 2020
    Inventors: Toshihiko AKIBA, Kenji SAKATA, Nobuhiro KINOSHITA, Yosuke KATSURA
  • Publication number: 20190363050
    Abstract: Performance of a semiconductor device is improved. The semiconductor device includes a semiconductor chip and a chip component that are electrically connected to each other via a wiring substrate. The semiconductor chip includes an input/output circuit and an electrode pad electrically connected to the input/output circuit and transmitting the signal. The chip component includes a plurality of types of passive elements and includes an equalizer circuit for correcting signal waveforms of the signal, and electrodes electrically connected to the equalizer circuit. The path length from the signal electrode of the semiconductor chip to the electrode of the chip component is 1/16 or more and 3.5/16 or less with respect to the wavelength of the signal.
    Type: Application
    Filed: May 7, 2019
    Publication date: November 28, 2019
    Inventors: Shuuichi KARIYAZAKI, Kazuyuki NAKAGAWA, Keita TSUCHIYA, Yosuke KATSURA, Shinji KATAYAMA, Norio CHUJO, Masayoshi YAGYU, Yutaka UEMATSU
  • Publication number: 20170178985
    Abstract: A semiconductor device includes a semiconductor chip and a package structure mounted on a wiring substrate, and a lid for covering the semiconductor chip, which is fixed to the surface of the wiring substrate, without overlapping with the package structure in plan view. The lid includes an upper surface portion overlapping with the semiconductor chip, a flange portion fixed to the surface of the wiring substrate, and a slant portion for jointing the upper surface portion and the flange portion. Then, a distance from the surface of the wiring substrate to the top surface of the upper surface portion is larger than a distance from the surface of the wiring substrate to the top surface of the flange portion.
    Type: Application
    Filed: October 25, 2016
    Publication date: June 22, 2017
    Inventors: Yoshiaki SATO, Yosuke KATSURA
  • Publication number: 20170053846
    Abstract: A semiconductor device includes a memory component, which is a semiconductor component (a semiconductor chip or a semiconductor package), to be mounted over an upper surface of a wiring substrate. In addition, in the upper surface, a distance between the memory component and a first substrate side of the upper surface is smaller than a distance between the memory component and a second substrate side of the upper surface. In addition, in the upper surface, a dam portion is formed between the memory component and the first substrate side.
    Type: Application
    Filed: July 27, 2016
    Publication date: February 23, 2017
    Inventors: Yosuke KATSURA, Yusuke TANUMA
  • Patent number: 7867309
    Abstract: In a steam-water separator, horizontal slits are formed on the outer side of the curving direction of the curved part and at a location between the curved part of the riser and the swirl vane.
    Type: Grant
    Filed: February 20, 2007
    Date of Patent: January 11, 2011
    Assignee: Mitsubishi Heavy Industries, Ltd.
    Inventors: Tadahiko Suzuta, Yoshiyuki Kondo, Toshiyuki Mizutani, Kengo Shimamura, Naoaki Hirota, Yosuke Katsura
  • Publication number: 20090197370
    Abstract: There is provided a method and an apparatus for manufacturing a semiconductor device having a lidless and highly reliable flip-chip structure. The method for manufacturing a semiconductor device wherein an underfill resin is filled in a space between a substrate and a semiconductor chip includes injecting a first underfill resin in said space under a first injecting condition; specifying a location where the fillet height of the underfill resin formed on the side of said semiconductor chip does not meet a prescribed standard; and injecting a second underfill resin in a location where the fillet height does not meet the prescribed standard under a second injecting condition. Since the fillet heights can uniformly meet the prescribed standard, the concentration of stress can be avoided, and a semiconductor device having a lidless and highly reliable flip-chip structure can be manufactured.
    Type: Application
    Filed: January 26, 2009
    Publication date: August 6, 2009
    Applicant: NEC Electronics Corporation
    Inventors: Yosuke Katsura, Ichiro Saisho, Rika Iwanami
  • Publication number: 20090120297
    Abstract: In a steam-water separator, horizontal slits are formed on the outer side of the curving direction of the curved part and at a location between the curved part of the riser and the swirl vane.
    Type: Application
    Filed: February 20, 2007
    Publication date: May 14, 2009
    Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.
    Inventors: Tadahiko Suzuta, Yoshiyuki Kondo, Toshiyuki Mizutani, Kengo Shimamura, Naoaki Hirota, Yosuke Katsura
  • Publication number: 20080088626
    Abstract: A 3D image data compression system, a method a program and a recording medium storing the program are provided for effectively compressing a data amount and obtaining a decompressed 3D image with little distortion. A recording medium also is provided for storing the compressed 3D image data. The system generates, a cut path based on a texture distribution of the surface of the 3D image so as to reduce the distortion of the 3D image reproduced from the compressed data. Geometric information and optical information of the 3D image data are correlated with points within a 2D planar figure based on the texture distribution of the surface of the 3D image so as to reduce the distortion of the 3D image reproduced from the compressed data.
    Type: Application
    Filed: December 9, 2005
    Publication date: April 17, 2008
    Applicant: KYOTO UNIVERSITY
    Inventors: Hitoshi Habe, Takashi Matsuyama, Yosuke Katsura