Patents by Inventor Yosuke Katsura
Yosuke Katsura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240345778Abstract: A management server stores box data received from an image forming apparatus as an export side, generates box configuration data that indicates the box data, upon receiving an import request of the box data from an image forming apparatus as an import side, transmits the box configuration data, and transmits the box data after the transmission of the box configuration data. The image forming apparatus as the import side transmits the import request, receives and saves the box configuration data and thereby registers the box configuration data to the box function, and receives and saves the box data after the receipt and the saving of the box configuration data. The image forming apparatus as the import side displays a list of the box data regardless of whether the box data has been received or not after registering the box configuration data.Type: ApplicationFiled: April 9, 2024Publication date: October 17, 2024Inventors: Shinya Ogawa, Yoshitaka Kishi, Yosuke Morishita, Kenichi Katsura
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Publication number: 20240345783Abstract: An image forming system 100 includes a terminal 10, an image forming apparatus 20, and a network repeater 30. The image forming apparatus 20 includes a writer 24 that writes identification information of the network repeater 30 to a wireless communication tag 22. The terminal 10 includes a display device 12 that presents the identification information read from the wireless communication tag 22, a terminal's communication device 16 that is allowed to connect to and communicate with the image forming apparatus 20, and a transmitter 14 that transmits, to the image forming apparatus 20, the identification information selected by a user and an encryption key entered by the user. The image forming apparatus 20 configures a connection with the network repeater 30 based on the identification information and the encryption key transmitted from the terminal 10.Type: ApplicationFiled: April 10, 2024Publication date: October 17, 2024Applicant: KYOCERA Document Solutions Inc.Inventors: Yosuke MORISHITA, Yoshitaka KISHI, Kenichi KATSURA, Shinya OGAWA
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Publication number: 20230411368Abstract: Reliability of a semiconductor device is improved. The semiconductor device includes a wiring substrate, a semiconductor chip and a capacitor mounted on the upper surface of the wiring substrate, and a lid formed of a metallic plate covering the semiconductor chip and the wire in substrate. The semiconductor chip is bonded to the lid via a conductive adhesive layer, and the capacitor, which is thicker than the thickness of the semiconductor chip, is disposed in the cut off portion provided in the lid, and is exposed from the lid.Type: ApplicationFiled: September 6, 2023Publication date: December 21, 2023Inventors: Toshihiko AKIBA, Kenji SAKATA, Nobuhiro KINOSHITA, Yosuke KATSURA
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Patent number: 11784173Abstract: Reliability of a semiconductor device is improved. The semiconductor device PKG1 includes a wiring substrate SUB1, a semiconductor chip CHP1 and a capacitor CDC mounted on the upper surface 2t of the wiring substrate SUB1, and a lid LD formed of a metallic plate covering the semiconductor chip CHP1 and the wiring substrate SUB1. The semiconductor chip CHP1 is bonded to the lid LD via a conductive adhesive layer, and the capacitor CDC, which is thicker than the thickness of the semiconductor chip CHP1, is disposed in the cut off portion 4d1 provided in the lid LD, and is exposed from the lid LD.Type: GrantFiled: September 27, 2021Date of Patent: October 10, 2023Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Toshihiko Akiba, Kenji Sakata, Nobuhiro Kinoshita, Yosuke Katsura
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Publication number: 20220013508Abstract: Reliability of a semiconductor device is improved. The semiconductor device PKG1 includes a wiring substrate SUB1, a semiconductor chip CHP1 and a capacitor CDC mounted on the upper surface 2t of the wiring substrate SUB1, and a lid LD formed of a metallic plate covering the semiconductor chip CHP1 and the wiring substrate SUB1. The semiconductor chip CHP1 is bonded to the lid LD via a conductive adhesive layer, and the capacitor CDC, which is thicker than the thickness of the semiconductor chip CHP1, is disposed in the cut off portion 4d1 provided in the lid LD, and is exposed from the lid LD.Type: ApplicationFiled: September 27, 2021Publication date: January 13, 2022Inventors: Toshihiko AKIBA, Kenji SAKATA, Nobuhiro KINOSHITA, Yosuke KATSURA
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Patent number: 11158617Abstract: Reliability of a semiconductor device is improved. The semiconductor device PKG1 includes a wiring substrate SUB1, a semiconductor chip CHP1 and a capacitor CDC mounted on the upper surface 2t of the wiring substrate SUB1, and a lid LD formed of a metallic plate covering the semiconductor chip CHP1 and the wiring substrate SUB1. The semiconductor chip CHP1 is bonded to the lid LD via a conductive adhesive layer, and the capacitor CDC, which is thicker than the thickness of the semiconductor chip CHP1, is disposed in the cut off portion 4d1 provided in the lid LD, and is exposed from the lid LD.Type: GrantFiled: June 18, 2019Date of Patent: October 26, 2021Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Toshihiko Akiba, Kenji Sakata, Nobuhiro Kinoshita, Yosuke Katsura
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Patent number: 10763214Abstract: Performance of a semiconductor device is improved. The semiconductor device includes a semiconductor chip and a chip component that are electrically connected to each other via a wiring substrate. The semiconductor chip includes an input/output circuit and an electrode pad electrically connected to the input/output circuit and transmitting the signal. The chip component includes a plurality of types of passive elements and includes an equalizer circuit for correcting signal waveforms of the signal, and electrodes electrically connected to the equalizer circuit. The path length from the signal electrode of the semiconductor chip to the electrode of the chip component is 1/16 or more and 3.5/16 or less with respect to the wavelength of the signal.Type: GrantFiled: May 7, 2019Date of Patent: September 1, 2020Assignee: RENESAS ELECTRONICS CORPORATIONInventors: Shuuichi Kariyazaki, Kazuyuki Nakagawa, Keita Tsuchiya, Yosuke Katsura, Shinji Katayama, Norio Chujo, Masayoshi Yagyu, Yutaka Uematsu
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Patent number: 10553558Abstract: A semiconductor device includes a memory component, which is a semiconductor component (a semiconductor chip or a semiconductor package), to be mounted over an upper surface of a wiring substrate. In addition, in the upper surface, a distance between the memory component and a first substrate side of the upper surface is smaller than a distance between the memory component and a second substrate side of the upper surface. In addition, in the upper surface, a dam portion is formed between the memory component and the first substrate side.Type: GrantFiled: July 27, 2016Date of Patent: February 4, 2020Assignee: Renesas Electronics CorporationInventors: Yosuke Katsura, Yusuke Tanuma
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Publication number: 20200006303Abstract: Reliability of a semiconductor device is improved. The semiconductor device PKG1 includes a wiring substrate SUB1, a semiconductor chip CHP1 and a capacitor CDC mounted on the upper surface 2t of the wiring substrate SUB1, and a lid LD formed of a metallic plate covering the semiconductor chip CHP1 and the wiring substrate SUB1. The semiconductor chip CHP1 is bonded to the lid LD via a conductive adhesive layer, and the capacitor CDC, which is thicker than the thickness of the semiconductor chip CHP1, is disposed in the cut off portion 4d1 provided in the lid LD, and is exposed from the lid LD.Type: ApplicationFiled: June 18, 2019Publication date: January 2, 2020Inventors: Toshihiko AKIBA, Kenji SAKATA, Nobuhiro KINOSHITA, Yosuke KATSURA
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Publication number: 20190363050Abstract: Performance of a semiconductor device is improved. The semiconductor device includes a semiconductor chip and a chip component that are electrically connected to each other via a wiring substrate. The semiconductor chip includes an input/output circuit and an electrode pad electrically connected to the input/output circuit and transmitting the signal. The chip component includes a plurality of types of passive elements and includes an equalizer circuit for correcting signal waveforms of the signal, and electrodes electrically connected to the equalizer circuit. The path length from the signal electrode of the semiconductor chip to the electrode of the chip component is 1/16 or more and 3.5/16 or less with respect to the wavelength of the signal.Type: ApplicationFiled: May 7, 2019Publication date: November 28, 2019Inventors: Shuuichi KARIYAZAKI, Kazuyuki NAKAGAWA, Keita TSUCHIYA, Yosuke KATSURA, Shinji KATAYAMA, Norio CHUJO, Masayoshi YAGYU, Yutaka UEMATSU
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Publication number: 20170178985Abstract: A semiconductor device includes a semiconductor chip and a package structure mounted on a wiring substrate, and a lid for covering the semiconductor chip, which is fixed to the surface of the wiring substrate, without overlapping with the package structure in plan view. The lid includes an upper surface portion overlapping with the semiconductor chip, a flange portion fixed to the surface of the wiring substrate, and a slant portion for jointing the upper surface portion and the flange portion. Then, a distance from the surface of the wiring substrate to the top surface of the upper surface portion is larger than a distance from the surface of the wiring substrate to the top surface of the flange portion.Type: ApplicationFiled: October 25, 2016Publication date: June 22, 2017Inventors: Yoshiaki SATO, Yosuke KATSURA
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Publication number: 20170053846Abstract: A semiconductor device includes a memory component, which is a semiconductor component (a semiconductor chip or a semiconductor package), to be mounted over an upper surface of a wiring substrate. In addition, in the upper surface, a distance between the memory component and a first substrate side of the upper surface is smaller than a distance between the memory component and a second substrate side of the upper surface. In addition, in the upper surface, a dam portion is formed between the memory component and the first substrate side.Type: ApplicationFiled: July 27, 2016Publication date: February 23, 2017Inventors: Yosuke KATSURA, Yusuke TANUMA
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Patent number: 7867309Abstract: In a steam-water separator, horizontal slits are formed on the outer side of the curving direction of the curved part and at a location between the curved part of the riser and the swirl vane.Type: GrantFiled: February 20, 2007Date of Patent: January 11, 2011Assignee: Mitsubishi Heavy Industries, Ltd.Inventors: Tadahiko Suzuta, Yoshiyuki Kondo, Toshiyuki Mizutani, Kengo Shimamura, Naoaki Hirota, Yosuke Katsura
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Publication number: 20090197370Abstract: There is provided a method and an apparatus for manufacturing a semiconductor device having a lidless and highly reliable flip-chip structure. The method for manufacturing a semiconductor device wherein an underfill resin is filled in a space between a substrate and a semiconductor chip includes injecting a first underfill resin in said space under a first injecting condition; specifying a location where the fillet height of the underfill resin formed on the side of said semiconductor chip does not meet a prescribed standard; and injecting a second underfill resin in a location where the fillet height does not meet the prescribed standard under a second injecting condition. Since the fillet heights can uniformly meet the prescribed standard, the concentration of stress can be avoided, and a semiconductor device having a lidless and highly reliable flip-chip structure can be manufactured.Type: ApplicationFiled: January 26, 2009Publication date: August 6, 2009Applicant: NEC Electronics CorporationInventors: Yosuke Katsura, Ichiro Saisho, Rika Iwanami
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Publication number: 20090120297Abstract: In a steam-water separator, horizontal slits are formed on the outer side of the curving direction of the curved part and at a location between the curved part of the riser and the swirl vane.Type: ApplicationFiled: February 20, 2007Publication date: May 14, 2009Applicant: MITSUBISHI HEAVY INDUSTRIES, LTD.Inventors: Tadahiko Suzuta, Yoshiyuki Kondo, Toshiyuki Mizutani, Kengo Shimamura, Naoaki Hirota, Yosuke Katsura
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Publication number: 20080088626Abstract: A 3D image data compression system, a method a program and a recording medium storing the program are provided for effectively compressing a data amount and obtaining a decompressed 3D image with little distortion. A recording medium also is provided for storing the compressed 3D image data. The system generates, a cut path based on a texture distribution of the surface of the 3D image so as to reduce the distortion of the 3D image reproduced from the compressed data. Geometric information and optical information of the 3D image data are correlated with points within a 2D planar figure based on the texture distribution of the surface of the 3D image so as to reduce the distortion of the 3D image reproduced from the compressed data.Type: ApplicationFiled: December 9, 2005Publication date: April 17, 2008Applicant: KYOTO UNIVERSITYInventors: Hitoshi Habe, Takashi Matsuyama, Yosuke Katsura