Patents by Inventor Yosuke Mitani

Yosuke Mitani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11974501
    Abstract: Provided is a novel chalcogen-containing organic semiconductor compound having excellent carrier mobility. The compound is represented by Formula (1a) or (1b): [Chem. 1] where in Formulas (1a) and (1b), X represents S, O, or Se, and R1 each independently represents a hydrogen atom, a halogen atom, an alkyl group, an aryl group, an aralkyl group, a pyridyl group, a furyl group, a thienyl group, or a thiazolyl group.
    Type: Grant
    Filed: August 29, 2019
    Date of Patent: April 30, 2024
    Assignees: THE UNIVERSITY OF TOKYO, PI-CRYSTAL INC.
    Inventors: Toshihiro Okamoto, Junichi Takeya, Masato Mitani, Yosuke Ito, Tomonori Matsumuro
  • Publication number: 20240116943
    Abstract: The present invention provides a compound having a Pim-1 inhibitory activity. The present invention provides a compound of Formula [I] or a pharmaceutically acceptable salt thereof, a pharmaceutical composition containing the same, and a pharmaceutical use thereof, and the like. wherein each symbol is as defined in the description.
    Type: Application
    Filed: March 21, 2023
    Publication date: April 11, 2024
    Inventors: Masafumi Inoue, Yosuke Ogoshi, Takayuki Furukawa, Takuya Machida, Ikuo Mitani, Kazuhito Harada, Yuichi Nakagawa, Nobutaka Yamaoka
  • Patent number: 9634688
    Abstract: An integrator including: a resistive element connected to an input terminal; an operational amplifier configured to receive, through the resistive element, an input signal that has been supplied to the input terminal; and a voltage regulator circuit connected to an intermediate node between the resistive element and the operational amplifier. The voltage regulator circuit has a first current source connected to the intermediate node, and a switch connected between the intermediate node and the first current source and selectively turning ON or OFF.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: April 25, 2017
    Assignee: SOCIONEXT INC.
    Inventors: Yosuke Mitani, Takashi Morie, Kazuo Matsukawa
  • Publication number: 20160308553
    Abstract: Disclosed herein is an integrator including: a resistive element connected to an input terminal; an operational amplifier configured to receive, through the resistive element, an input signal that has been supplied to the input terminal; and a voltage regulator circuit connected to an intermediate node between the resistive element and the operational amplifier. The voltage regulator circuit has a first current source connected to the intermediate node, and a switch connected between the intermediate node and the first current source and selectively turning ON or OFF.
    Type: Application
    Filed: June 27, 2016
    Publication date: October 20, 2016
    Applicant: SOCIONEXT INC.
    Inventors: Yosuke MITANI, Takashi MORIE, Kazuo MATSUKAWA
  • Patent number: 9438268
    Abstract: This D/A converter includes a plurality of D/A converter elements, each comprising current sources configured to supply output currents to output nodes, and first switches configured to control the output currents. The output nodes are connected to a capacitor section having second switches and a capacitive load. The D/A converter further includes a switch control circuit configured to control the first switches responsive to digital signals, and also control the second switches in accordance with the control of the ON/OFF state of the first switches.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: September 6, 2016
    Assignee: SOCIONEXT INC.
    Inventors: Yosuke Mitani, Takashi Morie, Kazuo Matsukawa, Masashi Uchida
  • Publication number: 20160126973
    Abstract: This D/A converter includes a plurality of D/A converter elements, each comprising current sources configured to supply output currents to output nodes, and first switches configured to control the output currents. The output nodes are connected to a capacitor section having second switches and a capacitive load. The D/A converter further includes a switch control circuit configured to control the first switches responsive to digital signals, and also control the second switches in accordance with the control of the ON/OFF state of the first switches.
    Type: Application
    Filed: January 8, 2016
    Publication date: May 5, 2016
    Inventors: Yosuke Mitani, Takashi Morie, Kazuo Matsukawa, Masashi Uchida
  • Patent number: 9287887
    Abstract: DEM circuit (130) includes a switch (131) configured to receive an N-bit digital input signal (SD1) and shift bit positions of the digital input signal (SD1) based on a switch control signal (SC) in a circulating pattern to output the digital input signal (SD1) as an N-bit digital output signal (SD2), where N is an integer greater than or equal to 2, and a switch control signal generation circuit (132) including a plurality of pointers which move in an identical direction based on a predetermined rule, and configured to generate the switch control signal (SC), each time when the digital input signal (SD1) is input to the switch (131), by using the pointers in a predetermined order.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: March 15, 2016
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Koji Obata, Kazuo Matsukawa, Yosuke Mitani
  • Patent number: 9178530
    Abstract: A delta sigma modulator includes a filter circuit including an integrator having an operational amplifier; a first addition circuit provided between an output section of the filter circuit and an input section of a quantizer, and including a first resistive element; and a second addition circuit including at least one of a first feedforward circuit including a second resistive element or a first feedback circuit configured to feed back, as an analog signal, a digital output signal having been quantized by the quantizer, to an input section of the quantizer, wherein at least one of the first addition circuit or the first feedback circuit includes a phase compensator.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: November 3, 2015
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Yosuke Mitani, Kazuo Matsukawa, Koji Obata, Shiro Dosho
  • Patent number: 8981978
    Abstract: Two resistive elements and a capacitive element are coupled between a first node and each of an inverting input terminal of an operational amplifier, an output terminal of the operational amplifier, and a common node. A resistive element and a capacitive element are coupled between the first node and a signal input terminal. Two capacitive elements and a resistive element are coupled between a second node and each of the inverting input terminal, the output terminal, and the common node. Two capacitive elements are coupled between the second node and each of the signal input terminal, and the common node.
    Type: Grant
    Filed: November 5, 2013
    Date of Patent: March 17, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Shiro Dosho, Kazuo Matsukawa, Yosuke Mitani
  • Patent number: 8963753
    Abstract: An oversampling A/D converter includes a first filter including a first resistive element, a first capacitive element, a second resistive element, an operational amplifier, and a second capacitive element; a second filter receiving an output of the first filter; a third filter including a third resistive element, a third capacitive element, and a fourth resistive element; a quantizer receiving an output of the third filter and generating a digital signal; and a D/A converter converting the digital signal to an analog current signal. The D/A converter inputs the generated analog current signal to an inverting input terminal of the operational amplifier.
    Type: Grant
    Filed: May 20, 2013
    Date of Patent: February 24, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Shiro Dosho, Kazuo Matsukawa, Masao Takayama, Yosuke Mitani
  • Patent number: 8937567
    Abstract: A delta-sigma modulator includes: an integrator having an operational amplifier; a quantizer quantizing an output of the integrator; a first D-A converter converting an output of the quantizer to a current signal to provide negative feedback to the operational amplifier; a feedforward path feeding forward an input of the integrator to the quantizer; and a second D-A converter converting the output of the quantizer to a current signal to provide negative feedback to the quantizer. The integrator includes a resistive element having a first end connected to the input of the integrator and a second end connected to an inverting input of the operational amplifier, n capacitive circuits connected in series between the inverting input and an output of the operational amplifier, and (n?1) resistive elements each having a first end connected to an interconnecting node of the capacitive circuits and a second end connected to a common node.
    Type: Grant
    Filed: February 27, 2013
    Date of Patent: January 20, 2015
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventors: Koji Obata, Kazuo Matsukawa, Yosuke Mitani, Shiro Dosho
  • Patent number: 8872684
    Abstract: A delta-sigma A/D converter includes a loop filter including a resonant filter, a quantizer, and a feedback D/A converter. The resonant filter includes a resonator including a resistor and a capacitor, and a feedback path through which an output of the resonator is positively fed back to an input of the resonator. The resonant filter operates as an oscillator or a filter under the on/off control of a first switch. At least one of the resistor and the capacitor of the resonator is configured to allow a resistance value or a capacitance value thereof to be adjusted based on a third external signal.
    Type: Grant
    Filed: May 30, 2014
    Date of Patent: October 28, 2014
    Assignee: Panasonic Corporation
    Inventors: Kazuo Matsukawa, Yosuke Mitani, Koji Obata
  • Publication number: 20140301253
    Abstract: DEM circuit (130) includes a switch (131) configured to receive an N-bit digital input signal (SD1) and shift bit positions of the digital input signal (SD1) based on a switch control signal (SC) in a circulating pattern to output the digital input signal (SD1) as an N-bit digital output signal (SD2), where N is an integer greater than or equal to 2, and a switch control signal generation circuit (132) including a plurality of pointers which move in an identical direction based on a predetermined rule, and configured to generate the switch control signal (SC), each time when the digital input signal (SD1) is input to the switch (131), by using the pointers in a predetermined order.
    Type: Application
    Filed: June 19, 2014
    Publication date: October 9, 2014
    Inventors: Koji OBATA, Kazuo MATSUKAWA, Yosuke MITANI
  • Publication number: 20140266828
    Abstract: A delta-sigma A/D converter includes a loop filter including a resonant filter, a quantizer, and a feedback D/A converter. The resonant filter includes a resonator including a resistor and a capacitor, and a feedback path through which an output of the resonator is positively fed back to an input of the resonator. The resonant filter operates as an oscillator or a filter under the on/off control of a first switch. At least one of the resistor and the capacitor of the resonator is configured to allow a resistance value or a capacitance value thereof to be adjusted based on a third external signal.
    Type: Application
    Filed: May 30, 2014
    Publication date: September 18, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Kazuo MATSUKAWA, Yosuke MITANI, Koji OBATA
  • Patent number: 8823567
    Abstract: Two T filters, one of which includes two resistive elements and one capacitive element and the other of which includes two capacitive elements and one resistive element, are inserted in a negative-feedback section of an operational amplifier, and a resistive element and a capacitive element are connected between each of intermediate nodes and a signal input terminal. A resistive element and a capacitive element which are connected to each other in parallel are connected between the signal input terminal and an inverting input terminal of the operational amplifier. With this configuration, overall admittances where elements connected to the corresponding intermediate nodes are in parallel connection are equal to each other.
    Type: Grant
    Filed: June 27, 2012
    Date of Patent: September 2, 2014
    Assignee: Panasonic Corporation
    Inventors: Yosuke Mitani, Kazuo Matsukawa, Masao Takayama, Koji Obata, Shiro Dosho
  • Publication number: 20140113575
    Abstract: A delta sigma modulator includes a filter circuit including an integrator having an operational amplifier; a first addition circuit provided between an output section of the filter circuit and an input section of a quantizer, and including a first resistive element; and a second addition circuit including at least one of a first feedforward circuit including a second resistive element or a first feedback circuit configured to feed back, as an analog signal, a digital output signal having been quantized by the quantizer, to an input section of the quantizer, wherein at least one of the first addition circuit or the first feedback circuit includes a phase compensator.
    Type: Application
    Filed: December 23, 2013
    Publication date: April 24, 2014
    Applicant: Panasonic Corporation
    Inventors: Yosuke MITANI, Kazuo MATSUKAWA, Koji OBATA, Shiro DOSHO
  • Publication number: 20140055294
    Abstract: Two resistive elements and a capacitive element are coupled between a first node and each of an inverting input terminal of an operational amplifier, an output terminal of the operational amplifier, and a common node. A resistive element and a capacitive element are coupled between the first node and a signal input terminal. Two capacitive elements and a resistive element are coupled between a second node and each of the inverting input terminal, the output terminal, and the common node. Two capacitive elements are coupled between the second node and each of the signal input terminal, and the common node.
    Type: Application
    Filed: November 5, 2013
    Publication date: February 27, 2014
    Applicant: PANASONIC CORPORATION
    Inventors: Shiro DOSHO, Kazuo MATSUKAWA, Yosuke MITANI
  • Patent number: 8604956
    Abstract: Two resistive elements and a capacitive element are coupled between a first node and each of an inverting input terminal of an operational amplifier, an output terminal of the operational amplifier, and a common node. A resistive element and a capacitive element are coupled between the first node and a signal input terminal. Two capacitive elements and a resistive element are coupled between a second node and each of the inverting input terminal, the output terminal, and the common node. Two capacitive elements are coupled between the second node and each of the signal input terminal, and the common node.
    Type: Grant
    Filed: March 28, 2011
    Date of Patent: December 10, 2013
    Assignee: Panasonic Corporation
    Inventors: Shiro Dosho, Kazuo Matsukawa, Yosuke Mitani
  • Publication number: 20130249718
    Abstract: An oversampling A/D converter includes a first filter including a first resistive element, a first capacitive element, a second resistive element, an operational amplifier, and a second capacitive element; a second filter receiving an output of the first filter; a third filter including a third resistive element, a third capacitive element, and a fourth resistive element; a quantizer receiving an output of the third filter and generating a digital signal; and a D/A converter converting the digital signal to an analog current signal. The D/A converter inputs the generated analog current signal to an inverting input terminal of the operational amplifier.
    Type: Application
    Filed: May 20, 2013
    Publication date: September 26, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Shiro Dosho, Kazuo Matsukawa, Masao Takayama, Yosuke Mitani
  • Patent number: 8466820
    Abstract: An oversampling A/D converter includes a first filter including a first resistive element, a first capacitive element, a second resistive element, an operational amplifier, and a second capacitive element; a second filter receiving an output of the first filter; a third filter including a third resistive element, a third capacitive element, and a fourth resistive element; a quantizer receiving an output of the third filter and generating a digital signal; and a D/A converter converting the digital signal to an analog current signal. The D/A converter inputs the generated analog current signal to an inverting input terminal of the operational amplifier.
    Type: Grant
    Filed: February 11, 2011
    Date of Patent: June 18, 2013
    Assignee: Panasonic Corporation
    Inventors: Shiro Dosho, Kazuo Matsukawa, Masao Takayama, Yosuke Mitani